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− | {{title|Chip Multiprocessor | + | {{title|Chip Multiprocessor}} |
A '''chip multiprocessor''' ('''CMP''') or '''multi-core''' [[microprocessor architecture|architecture]] is a [[logic]] design architecture whereby multiple processing units (e.g., CPU cores) are integrated onto a single monolithic integrated circuit or onto multiple [[dies]] in a single [[package]]. | A '''chip multiprocessor''' ('''CMP''') or '''multi-core''' [[microprocessor architecture|architecture]] is a [[logic]] design architecture whereby multiple processing units (e.g., CPU cores) are integrated onto a single monolithic integrated circuit or onto multiple [[dies]] in a single [[package]]. | ||
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=== Heterogeneous multi-core architectures === | === Heterogeneous multi-core architectures === | ||
− | {{empty section}} | + | {{empty section}} |
==== Single and Multi-ISA designs ==== | ==== Single and Multi-ISA designs ==== | ||
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== Multi-core chips == | == Multi-core chips == | ||
{{collist | {{collist | ||
− | | count = | + | | count = 4 |
| | | | ||
* {{\\|2|2 (dual-core)}} | * {{\\|2|2 (dual-core)}} | ||
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* {{\\|46|46 (hexatetraconta-core)}} | * {{\\|46|46 (hexatetraconta-core)}} | ||
* {{\\|48|48 (octatetraconta-core)}} | * {{\\|48|48 (octatetraconta-core)}} | ||
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* {{\\|64|64 (tetrahexaconta-core)}} | * {{\\|64|64 (tetrahexaconta-core)}} | ||
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* {{\\|128|128 (octacosahecta-core)}} | * {{\\|128|128 (octacosahecta-core)}} | ||
* {{\\|256|256 (hexapentacontadicta-core)}} | * {{\\|256|256 (hexapentacontadicta-core)}} | ||
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=== Recent high core-core chips === | === Recent high core-core chips === | ||
− | The following is a select list of recent (2019) high core-count | + | The following is a select list of recent (2019) high core-count chips: |
<table class="wikitable"> | <table class="wikitable"> | ||
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* [[Cavium]] {{cavium|ThunderX2 CN9980}} <small>(2018)</small> | * [[Cavium]] {{cavium|ThunderX2 CN9980}} <small>(2018)</small> | ||
* [[Ampere Computing|Ampere]] {{ampere|eMAG 8180}} <small>(2018)</small> | * [[Ampere Computing|Ampere]] {{ampere|eMAG 8180}} <small>(2018)</small> | ||
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</td></tr> | </td></tr> | ||
<tr><th>'''[[40 cores]]'''</th><td> | <tr><th>'''[[40 cores]]'''</th><td> | ||
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<tr><th>'''[[48 cores]]'''</th><td> | <tr><th>'''[[48 cores]]'''</th><td> | ||
* [[Qualcomm]] {{qualcomm|Centriq 2460}} <small>(2017)</small> | * [[Qualcomm]] {{qualcomm|Centriq 2460}} <small>(2017)</small> | ||
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</td></tr> | </td></tr> | ||
<tr><th>'''[[64 cores]]'''</th><td> | <tr><th>'''[[64 cores]]'''</th><td> | ||
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* [[Phytium]] {{phytium|FT-2000}} <small>(2017)</small> | * [[Phytium]] {{phytium|FT-2000}} <small>(2017)</small> | ||
* Phytium {{phytium|FT-2000+}} <small>(2019)</small> | * Phytium {{phytium|FT-2000+}} <small>(2019)</small> | ||
− | + | </td></tr> | |
<tr><th>'''[[68 cores]]'''</th><td> | <tr><th>'''[[68 cores]]'''</th><td> | ||
* [[Intel]] {{intel|Xeon Phi 7250}} <small>(2016)</small> | * [[Intel]] {{intel|Xeon Phi 7250}} <small>(2016)</small> | ||
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<tr><th>'''[[72 cores]]'''</th><td> | <tr><th>'''[[72 cores]]'''</th><td> | ||
* [[Intel]] {{intel|Xeon Phi 7290}} <small>(2016)</small> | * [[Intel]] {{intel|Xeon Phi 7290}} <small>(2016)</small> | ||
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</td></tr> | </td></tr> | ||
<tr><th>'''[[128 cores]]'''</th><td> | <tr><th>'''[[128 cores]]'''</th><td> | ||
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</td></tr> | </td></tr> | ||
<tr><th>'''[[1024 cores]]'''</th><td> | <tr><th>'''[[1024 cores]]'''</th><td> | ||
− | * [[PEZY]] {{pezy|PEZY- | + | * [[PEZY]] {{pezy|PEZY-SC2}} <small>(2014)</small> |
</td></tr> | </td></tr> | ||
<tr><th>'''[[2048 cores]]'''</th><td> | <tr><th>'''[[2048 cores]]'''</th><td> |