From WikiChip
Editing arm holdings

Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.

The edit can be undone. Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.

This page supports semantic in-text annotations (e.g. "[[Is specified as::World Heritage Site]]") to build structured and queryable content provided by Semantic MediaWiki. For a comprehensive description on how to use annotations or the #ask parser function, please have a look at the getting started, in-text annotation, or inline queries help pages.

Latest revision Your text
Line 1: Line 1:
 
{{title|ARM Holdings}}
 
{{title|ARM Holdings}}
 
{{semi company
 
{{semi company
| name              = Arm Holdings
+
| name              = ARM Holdings
 
| logo              = ARM logo.svg
 
| logo              = ARM logo.svg
 
| logo size        = 150px
 
| logo size        = 150px
Line 27: Line 27:
 
}}-->
 
}}-->
 
}}
 
}}
'''Arm Holdings''', usually simply '''Arm''' (previously '''ARM'''), is a British multinational semiconductor and software design company. ARM was spun-off from [[Acorn Computers]] in November [[1990]] as ''Advanced RISC Machines, Ltd.'' (''ARM, Ltd.'') as a  joint venture between [[Acorn Computers]], [[Apple Computer]], and [[VLSI Technology]].
+
'''ARM Holdings''', usually simply '''ARM''', is a British multinational semiconductor and software design company. ARM was spun-off from [[Acorn Computers]] in November [[1990]] as ''Advanced RISC Machines, Ltd.'' (''ARM, Ltd.'') as a  joint venture between [[Acorn Computers]], [[Apple Computer]], and [[VLSI Technology]].
  
 
== Design Groups ==
 
== Design Groups ==
Line 34: Line 34:
 
* Austin (Texas)
 
* Austin (Texas)
 
** {{armh|Cortex-A8|l=arch}}, {{armh|Cortex-A15|l=arch}}, {{armh|Cortex-A57|l=arch}}, {{armh|Cortex-A72|l=arch}}, {{armh|Cortex-A76|l=arch}}, {{armh|Cortex-A77|l=arch}}, {{armh|Cortex-A78|l=arch}}
 
** {{armh|Cortex-A8|l=arch}}, {{armh|Cortex-A15|l=arch}}, {{armh|Cortex-A57|l=arch}}, {{armh|Cortex-A72|l=arch}}, {{armh|Cortex-A76|l=arch}}, {{armh|Cortex-A77|l=arch}}, {{armh|Cortex-A78|l=arch}}
** {{armh|Cortex-X1|l=arch}}, {{armh|Cortex-X2|l=arch}}, {{armh|Cortex-X3|l=arch}}
+
** {{armh|Cortex-X1|l=arch}}
** {{armh|Neoverse N1|l=arch}}, {{armh|Neoverse N2|l=arch}}, {{armh|Neoverse V1|l=arch}}
+
** {{armh|Neoverse N1|l=arch}}
 
* Sophia-Antipolis (France)
 
* Sophia-Antipolis (France)
 
** {{armh|ARM11|l=arch}}, {{armh|Cortex-A9|l=arch}}, {{armh|Cortex-A12|l=arch}}, {{armh|Cortex-A17|l=arch}}, {{armh|Cortex-A73|l=arch}}, {{armh|Cortex-A75|l=arch}}
 
** {{armh|ARM11|l=arch}}, {{armh|Cortex-A9|l=arch}}, {{armh|Cortex-A12|l=arch}}, {{armh|Cortex-A17|l=arch}}, {{armh|Cortex-A73|l=arch}}, {{armh|Cortex-A75|l=arch}}
Line 73: Line 73:
 
* {{armh|Cortex-R7|l=arch}}
 
* {{armh|Cortex-R7|l=arch}}
 
* {{armh|Cortex-R8|l=arch}}
 
* {{armh|Cortex-R8|l=arch}}
* {{armh|Cortex-R82|l=arch}}
 
 
'''Functional Safety:'''
 
'''Functional Safety:'''
 
* {{armh|Cortex-R4|l=arch}} (Serval-E)
 
* {{armh|Cortex-R4|l=arch}} (Serval-E)
Line 80: Line 79:
 
}}
 
}}
 
}}
 
}}
 +
  
 
{{lbox
 
{{lbox
Line 91: Line 91:
 
* {{armh|Cortex-M0|l=arch}} (Swift)
 
* {{armh|Cortex-M0|l=arch}} (Swift)
 
* {{armh|Cortex-M0+|l=arch}} (Flycatcher)
 
* {{armh|Cortex-M0+|l=arch}} (Flycatcher)
* {{armh|Cortex-M23|l=arch}} (Grebe)
+
* {{armh|Cortex-M23|l=arch}}
 
'''Performance/efficiency:'''
 
'''Performance/efficiency:'''
 
* {{armh|Cortex-M3|l=arch}} (Sandcat)
 
* {{armh|Cortex-M3|l=arch}} (Sandcat)
 
* {{armh|Cortex-M4|l=arch}} (Merlin)
 
* {{armh|Cortex-M4|l=arch}} (Merlin)
* {{armh|Cortex-M33|l=arch}} (Teal)
+
* {{armh|Cortex-M33|l=arch}}
* {{armh|Cortex-M35P|l=arch}} (Tahan)
+
* {{armh|Cortex-M35P|l=arch}}
 
'''High Performance:'''
 
'''High Performance:'''
 
* {{armh|Cortex-M7|l=arch}} (Pelican)
 
* {{armh|Cortex-M7|l=arch}} (Pelican)
* {{armh|Cortex-M55|l=arch}} (Yamin)
+
* {{armh|Cortex-M55|l=arch}}
 
'''FPGA:'''
 
'''FPGA:'''
* {{armh|Cortex-M1|l=arch}} (Proteus)
+
* {{armh|Cortex-M1|l=arch}}
 
}}
 
}}
 
}}
 
}}
 +
  
 
{{lbox
 
{{lbox
Line 117: Line 118:
 
'''ULP:'''
 
'''ULP:'''
 
* {{armh|Cortex-A5|l=arch}} (Sparrow)
 
* {{armh|Cortex-A5|l=arch}} (Sparrow)
* {{armh|Cortex-A34|l=arch}} (Metis)
+
* {{armh|Cortex-A34|l=arch}}  
 
* {{armh|Cortex-A35|l=arch}} (Mercury)
 
* {{armh|Cortex-A35|l=arch}} (Mercury)
* {{armh|Cortex-A32|l=arch}} (Minerva)
+
* {{armh|Cortex-A32|l=arch}}
 
'''[[little core|Little]]:'''
 
'''[[little core|Little]]:'''
 
* {{armh|Cortex-A7|l=arch}} (Kingfisher)
 
* {{armh|Cortex-A7|l=arch}} (Kingfisher)
 
* {{armh|Cortex-A53|l=arch}} (Apollo)
 
* {{armh|Cortex-A53|l=arch}} (Apollo)
 
* {{armh|Cortex-A55|l=arch}} (Ananke)
 
* {{armh|Cortex-A55|l=arch}} (Ananke)
* {{armh|Cortex-A510|l=arch}} (Klein)
+
* {{armh|Helios|l=arch}}
* {{armh|Hayes|l=arch}}
 
 
'''Mid-Range'''
 
'''Mid-Range'''
 
* <s>{{armh|Cortex-A12|l=arch}}</s> (Owl)
 
* <s>{{armh|Cortex-A12|l=arch}}</s> (Owl)
* {{armh|Cortex-A17|l=arch}} (Owl)
+
* {{armh|Cortex-A17|l=arch}}
 
'''[[big core|Big]]:'''
 
'''[[big core|Big]]:'''
 
* {{armh|Cortex-A15|l=arch}} (Eagle)
 
* {{armh|Cortex-A15|l=arch}} (Eagle)
 
* {{armh|Cortex-A57|l=arch}} (Atlas)
 
* {{armh|Cortex-A57|l=arch}} (Atlas)
* {{armh|Cortex-A72|l=arch}} (Maia)
+
* {{armh|Cortex-A72|l=arch}} (Maya)
 
* {{armh|Cortex-A73|l=arch}} (Artemis)
 
* {{armh|Cortex-A73|l=arch}} (Artemis)
 
* {{armh|Cortex-A75|l=arch}} (Prometheus)
 
* {{armh|Cortex-A75|l=arch}} (Prometheus)
Line 138: Line 138:
 
* {{armh|Cortex-A77|l=arch}} (Deimos)
 
* {{armh|Cortex-A77|l=arch}} (Deimos)
 
* {{armh|Cortex-A78|l=arch}} (Hercules)
 
* {{armh|Cortex-A78|l=arch}} (Hercules)
* {{armh|Cortex-A710|l=arch}} (Matterhorn)
+
* {{armh|Matterhorn|l=arch}}
* {{armh|Cortex-A715|l=arch}} (Makalu)
 
* {{armh|Hunter|l=arch}}
 
* {{armh|Chaberton|l=arch}}
 
 
 
 
 
* {{armh|Cortex-A78C|l=arch}} (Hercules-C)
 
 
'''[[big core|Bigger]]:'''
 
'''[[big core|Bigger]]:'''
 
* {{armh|Cortex-X1|l=arch}} (Hera)
 
* {{armh|Cortex-X1|l=arch}} (Hera)
* {{armh|Cortex-X2|l=arch}} (Matterhorn-ELP)
 
* {{armh|Cortex-X3|l=arch}} (Makalu-ELP)
 
* {{armh|Hunter-ELP|l=arch}}
 
* {{armh|Chaberton-ELP|l=arch}}
 
 
 
* {{armh|Cortex-X1C|l=arch}} (Hera-C)
 
 
'''Autonomous Machines:'''
 
'''Autonomous Machines:'''
* {{armh|Cortex-A76AE|l=arch}} (Enyo-SL)
+
* {{armh|Cortex-A76AE|l=arch}}
* {{armh|Cortex-A78AE|l=arch}} (Hercules-AE)
+
* {{armh|Cortex-A65AE|l=arch}}
* {{armh|Cortex-A65AE|l=arch}} (Helios-SL)
 
 
}}
 
}}
 
}}
 
}}
Line 172: Line 158:
 
* {{armh|Cosmos|l=arch}}
 
* {{armh|Cosmos|l=arch}}
 
* {{armh|Neoverse N1|l=arch}} (Ares)
 
* {{armh|Neoverse N1|l=arch}} (Ares)
* {{armh|Neoverse N2|l=arch}} (Perseus)
+
* {{armh|Zeus|l=arch}}
 
* {{armh|Poseidon|l=arch}}
 
* {{armh|Poseidon|l=arch}}
'''HPC'''
 
* {{armh|Neoverse V1|l=arch}} (Zeus)
 
* {{armh|Demeter|l=arch}}
 
 
'''Throughput'''
 
'''Throughput'''
* {{armh|Neoverse E1|l=arch}} (Helios)
+
* {{armh|Neoverse E1|l=arch}}
 
}}
 
}}
 
}}
 
}}
Line 201: Line 184:
 
== GPUs ==
 
== GPUs ==
 
* {{armh|Mali}}
 
* {{armh|Mali}}
* {{armh|Immortalis}}
 
  
 
== Architectures ==
 
== Architectures ==

Please note that all contributions to WikiChip may be edited, altered, or removed by other contributors. If you do not want your writing to be edited mercilessly, then do not submit it here.
You are also promising us that you wrote this yourself, or copied it from a public domain or similar free resource (see WikiChip:Copyrights for details). Do not submit copyrighted work without permission!

Cancel | Editing help (opens in new window)
Facts about "ARM Holdings"
company typepublic +
foundedNovember 27, 1990 +
founderJamie Urquhart +, Mike Muller +, Tudor Brown +, Lee Smith +, John Biggs +, Harry Oldham +, Dave Howard +, Pete Harrod +, Harry Meekings +, Al Thomas + and Andy Merritt +
full page namearm holdings +
headquartersCambridge, England +
instance ofsemiconductor company +
nameArm Holdings +
websitehttp://www.arm.com +
wikidata idQ296782 +