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{{arm title|ARMv1}}{{arm isa main}}
 
{{arm title|ARMv1}}{{arm isa main}}
'''ARMv1''' is the first [[ARM]] instruction set version. Introduced with the {{acorn|ARM1}} on April 26 1985, the ARMv1 defines a {{arch|32}} ISA along with {{arm|26-bit|26-bit addressing space}}. The ARMv1 was only implemented by the {{acorn|ARM1}} and was replaced soon after by the {{acorn|ARM2}}. Only a few hundred of those chips were ever fabricated.
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'''ARMv1''' is the first [[ARM]] instruction set version. Introduced with the {{armh|ARM1}} on April 26 1985, the ARMv1 defines a {{arch|32}} ISA along with {{arm|26-bit|26-bit addressing space}}. The ARMv1 was only implemented by the {{armh|ARM1}} and was replaced soon after by the {{armh|ARM2}}. Only a few hundred of those chips were ever fabricated.
  
 
== Overview ==
 
== Overview ==
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! Address !! Function !! Priority
 
! Address !! Function !! Priority
 
|-
 
|-
| 000 0000 || Reset || 0
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| 000 0000 !! Reset
 
|-
 
|-
| 000 0004 || Undefined Instruction Trap || 6
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| 000 0004 !! Undefined Instruction Trap
 
|-
 
|-
| 000 0008 || Software Interrupt || 7
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| 000 0008 !! Software Interrupt
 
|-
 
|-
| 000 000C || Abort (Prefetch) || 5
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| 000 000C !! Abort (Prefetch)
 
|-
 
|-
| 000 0010 || Abort (Data) || 2
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| 000 0010 !! Abort (Data)
 
|-
 
|-
| 000 0014 || Address Exception || 1
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| 000 0014 !! Address Exception
 
|-
 
|-
| 000 0018 || Normal Interrupt (IRQ) || 4
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| 000 0018 !! Normal Interrupt (IRQ)
 
|-
 
|-
| 000 001C || Fast Interrupt (FIRQ) || 3
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| 000 001C !! Fast Interrupt (FIRQ)

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