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{{arm title|ARMv1}}{{arm isa main}} | {{arm title|ARMv1}}{{arm isa main}} | ||
− | '''ARMv1''' is the first [[ARM]] instruction set version. Introduced with the {{ | + | '''ARMv1''' is the first [[ARM]] instruction set version. Introduced with the {{armh|ARM1}} on April 26 1985, the ARMv1 defines a {{arch|32}} ISA along with {{arm|26-bit|26-bit addressing space}}. The ARMv1 was only implemented by the {{armh|ARM1}} and was replaced soon after by the {{armh|ARM2}}. Only a few hundred of those chips were ever fabricated. |
== Overview == | == Overview == | ||
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! Address !! Function !! Priority | ! Address !! Function !! Priority | ||
|- | |- | ||
− | | 000 0000 | + | | 000 0000 !! Reset |
|- | |- | ||
− | | 000 0004 | + | | 000 0004 !! Undefined Instruction Trap |
|- | |- | ||
− | | 000 0008 | + | | 000 0008 !! Software Interrupt |
|- | |- | ||
− | | 000 000C | + | | 000 000C !! Abort (Prefetch) |
|- | |- | ||
− | | 000 0010 | + | | 000 0010 !! Abort (Data) |
|- | |- | ||
− | | 000 0014 | + | | 000 0014 !! Address Exception |
|- | |- | ||
− | | 000 0018 | + | | 000 0018 !! Normal Interrupt (IRQ) |
|- | |- | ||
− | | 000 001C | + | | 000 001C !! Fast Interrupt (FIRQ) |