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− | + | An '''adder''' (sometimes called a '''summer''') is a [[digital circuit]] that adds two ''N''-bit numbers and generates an ''N''-bit number. In addition to generating a sum, adders often also generate an [[overflow flag]] and a [[carry flag]]. Adders are used in many parts of the [[microprocessor]] such as the [[ALU]], [[program counter|PC]], [[counters]], calculating [[effective addresses]] and table indices, multipliers, filters, and in various other components. | |
− | An '''adder''' (sometimes called a '''summer''') is a | ||
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== Basic design == | == Basic design == | ||
− | < | + | <div style="float:right;"> |
− | + | <math> | |
− | A + B | + | A + B = Q \\ |
− | 0_2 + 0_2 | + | 0_2 + 0_2 = 00_2 \\ |
− | 0_2 + 1_2 | + | 0_2 + 1_2 = 01_2 \\ |
− | 1_2 + 0_2 | + | 1_2 + 0_2 = 01_2 \\ |
− | 1_2 + 1_2 | + | 1_2 + 1_2 = 10_2 |
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</math> | </math> | ||
+ | </div> | ||
A 1-bit adder adds two single-bit values together. There are four such possible operations. All but the 1+1 operation result in a single-digit sum. The 1+1 operation produces a sum with two digits. The higher significant bit of that value is known as a carry. The digital component that performs the addition of two bits is called a '''half adder'''. When two multi-bit numbers are added together, the carry out from the lower bit must be accounted for in the higher addition of the higher bits. When a half adder accounts for a carry in, it becomes a '''full adder'''. | A 1-bit adder adds two single-bit values together. There are four such possible operations. All but the 1+1 operation result in a single-digit sum. The 1+1 operation produces a sum with two digits. The higher significant bit of that value is known as a carry. The digital component that performs the addition of two bits is called a '''half adder'''. When two multi-bit numbers are added together, the carry out from the lower bit must be accounted for in the higher addition of the higher bits. When a half adder accounts for a carry in, it becomes a '''full adder'''. | ||
=== Half Adders (HA) === | === Half Adders (HA) === | ||
{{main|Half adder}} | {{main|Half adder}} | ||
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{| class="wikitable left" style="float:left; margin: 15px;" | {| class="wikitable left" style="float:left; margin: 15px;" | ||
!colspan="5"|Half Adder | !colspan="5"|Half Adder | ||
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<math> | <math> | ||
− | + | S = A \oplus B \\ | |
− | S = | + | C_{out} = A \cdot B |
− | C_{out} = | ||
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</math> | </math> | ||
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=== Full Adder (FA) === | === Full Adder (FA) === | ||
{{main|full adder}} | {{main|full adder}} | ||
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[[File:Full adder black box.svg|right|150px]] | [[File:Full adder black box.svg|right|150px]] | ||
A major drawback of a half adder is that it lacks the ability to add two bits and account for a carry-in that might have been brought from the previous digit. As previously stated, the carry-out of one half adder is the carry-in of the next half adder. A '''full adder''' is a simple device that can receive a carry-in bit input in addition to adding two single bit inputs. A full adder has three inputs A, B, and C<sub>in</sub> and two outputs S and C<sub>out</sub>. Full adders are typically combined together in a cascading way (C<sub>in</sub> to <sub>out</sub>), creating ''N''-bit adders (16, 32, 64, etc..). | A major drawback of a half adder is that it lacks the ability to add two bits and account for a carry-in that might have been brought from the previous digit. As previously stated, the carry-out of one half adder is the carry-in of the next half adder. A '''full adder''' is a simple device that can receive a carry-in bit input in addition to adding two single bit inputs. A full adder has three inputs A, B, and C<sub>in</sub> and two outputs S and C<sub>out</sub>. Full adders are typically combined together in a cascading way (C<sub>in</sub> to <sub>out</sub>), creating ''N''-bit adders (16, 32, 64, etc..). | ||
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<math> | <math> | ||
− | + | S = A \oplus B \oplus C \\ | |
− | S = | + | C_{out} = \text{Majority}(A, B, C) |
− | C_{out} = | ||
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</math> | </math> | ||
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Many complex adder designs relay on the ability to calculate carry bits quickly. | Many complex adder designs relay on the ability to calculate carry bits quickly. | ||
− | + | === Ripple-carry adder (RCA) === | |
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{{main|Ripple-carry adder}} | {{main|Ripple-carry adder}} | ||
{{empty section}} | {{empty section}} | ||
− | + | === Carry-lookahead adder (CLA) === | |
{{main|Carry-lookahead adder}} | {{main|Carry-lookahead adder}} | ||
{{empty section}} | {{empty section}} | ||
− | + | ==== Lookahead carry unit (LCU) ==== | |
{{main|Lookahead carry unit}} | {{main|Lookahead carry unit}} | ||
{{empty section}} | {{empty section}} | ||
− | + | === Manchester carry-chain adder === | |
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{{main|Manchester carry-chain adder}} | {{main|Manchester carry-chain adder}} | ||
{{empty section}} | {{empty section}} | ||
− | + | == Carry-select adder == | |
{{main|Carry-select adder}} | {{main|Carry-select adder}} | ||
{{empty section}} | {{empty section}} | ||
− | + | == Conditional-Sum Adder == | |
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{{main|Conditional-sum adder}} | {{main|Conditional-sum adder}} | ||
{{empty section}} | {{empty section}} | ||
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[[Category:Adders]] | [[Category:Adders]] |