Semiconductor & Computer Engineering
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| Latest revision | Your text | ||
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<pre> | <pre> | ||
{{microarchitecture | {{microarchitecture | ||
| − | |||
| name = | | name = | ||
| − | |||
| manufacturer = | | manufacturer = | ||
| introduction = | | introduction = | ||
| Line 13: | Line 11: | ||
| cores N = | | cores N = | ||
| + | | pipeline = <!-- yes for following options --> | ||
| type = <!-- e.g. "Superscalar" --> | | type = <!-- e.g. "Superscalar" --> | ||
| − | | | + | | OoOE = <!-- Yes or No only --> |
| − | + | | isa = | |
| − | + | | isa 2 = | |
| − | | | + | | isa N = |
| − | | | + | | stages = |
| − | | | + | | ipc = |
| − | | stages | ||
| − | |||
| − | | | ||
| − | | | + | | inst = <!-- yes for instructions options --> |
| − | |||
| − | |||
| feature = | | feature = | ||
| extension = | | extension = | ||
| − | |||
| − | |||
| + | | cache = <!-- yes for cache info --> | ||
| l1i = | | l1i = | ||
| l1i per = | | l1i per = | ||
| Line 39: | Line 32: | ||
| l1d desc = | | l1d desc = | ||
| l2 = | | l2 = | ||
| − | | l2 per | + | | l2 per = |
| − | | l2 desc | + | | l2 desc = |
| − | |||
| − | |||
| − | |||
| − | | | + | | succession = <!-- yes for succession info --> |
| − | + | | predecessor = | |
| − | + | | predecessor link = | |
| − | + | | successor = | |
| − | | predecessor = | + | | successor link = |
| − | | predecessor link = | ||
| − | | successor = | ||
| − | | successor link | ||
| − | |||
| − | |||
| − | |||
| − | |||
}} | }} | ||
</pre> | </pre> | ||