From WikiChip
Editing Template:main/chips2
Warning: You are not logged in. Your IP address will be publicly visible if you make any edits. If you log in or create an account, your edits will be attributed to your username, along with other benefits.
The edit can be undone.
Please check the comparison below to verify that this is what you want to do, and then save the changes below to finish undoing the edit.
This page is not enabled for semantic in-text annotations due to namespace restrictions. Details about how to enable the namespace can be found on the configuration help page.
Latest revision | Your text | ||
Line 1: | Line 1: | ||
− | <div style="text-decoration: underline; font-size: 1. | + | <div style="background:#f9f9f9; margin: 5px; padding: 5px; border: 1px solid #a7d7f9; display: inline-block;"> |
+ | <div style="text-decoration: underline; font-size: 1.6em;">Popular Processor Families (Current)<span style="float:right;">[http://en.wikichip.org/w/index.php?title=Template:main/chips2&action=edit <span style="font-size: 0.75em;">Edit</span>]</span></div> | ||
<div style="height: 400px; overflow-y: scroll;"> | <div style="height: 400px; overflow-y: scroll;"> | ||
{| style="font-type: Courier;" | {| style="font-type: Courier;" | ||
− | | rowspan="2" | [[File:mainpage x86 chip.svg|link= | + | | rowspan="2" | [[File:mainpage x86 chip.svg|link=|75px]] |
|- | |- | ||
| | | | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
{{main/i4|95px|0.9em|intel|'''Intel'''}} | {{main/i4|95px|0.9em|intel|'''Intel'''}} | ||
{{main/i4|95px|0.8em|intel/atom|Atom}} | {{main/i4|95px|0.8em|intel/atom|Atom}} | ||
Line 26: | Line 13: | ||
{{main/i4|95px|0.8em|intel/core i7|Core i7}} | {{main/i4|95px|0.8em|intel/core i7|Core i7}} | ||
{{main/i4|95px|0.8em|intel/core i7ee|Core i7EE}} | {{main/i4|95px|0.8em|intel/core i7ee|Core i7EE}} | ||
− | |||
{{main/i4|95px|0.8em|intel/core m|Core M}} | {{main/i4|95px|0.8em|intel/core m|Core M}} | ||
{{main/i4|95px|0.8em|intel/pentium (2009)|Pentium}} | {{main/i4|95px|0.8em|intel/pentium (2009)|Pentium}} | ||
− | |||
{{main/i4|95px|0.8em|intel/xeon e3|Xeon E3}} | {{main/i4|95px|0.8em|intel/xeon e3|Xeon E3}} | ||
{{main/i4|95px|0.8em|intel/xeon e5|Xeon E5}} | {{main/i4|95px|0.8em|intel/xeon e5|Xeon E5}} | ||
{{main/i4|95px|0.8em|intel/xeon e7|Xeon E7}} | {{main/i4|95px|0.8em|intel/xeon e7|Xeon E7}} | ||
− | {{main/i4|95px|0.8em| | + | {{main/i4|95px|0.9em|amd|'''AMD'''}} |
− | {{main/i4|95px|0.8em| | + | {{main/i4|95px|0.8em|amd/a10|A10}} |
− | {{main/i4|95px|0.8em| | + | {{main/i4|95px|0.8em|amd/a4|A4}} |
− | {{main/i4|95px|0.8em| | + | {{main/i4|95px|0.8em|amd/a6|A6}} |
− | {{main/i4|95px|0.8em| | + | {{main/i4|95px|0.8em|amd/a8|A8}} |
− | {{main/i4|95px|0. | + | {{main/i4|95px|0.8em|amd/athlon x4|Athlon X4}} |
+ | {{main/i4|95px|0.8em|amd/fx|FX}} | ||
+ | {{main/i4|95px|0.8em|amd/opteron|Opteron}} | ||
+ | {{main/i4|95px|0.8em|amd/sempron|Sempron}} | ||
{{main/i4|95px|0.9em|via technologies|'''VIA'''}} | {{main/i4|95px|0.9em|via technologies|'''VIA'''}} | ||
+ | {{main/i4|95px|0.8em|via technologies/eden|Eden}} | ||
+ | {{main/i4|95px|0.8em|via technologies/nano|Nano}} | ||
+ | {{main/i4|95px|0.8em|via technologies/nano x2|Nano X2}} | ||
{{main/i4|95px|0.8em|via technologies/quadcore|QuadCore}} | {{main/i4|95px|0.8em|via technologies/quadcore|QuadCore}} | ||
− | {{main/i4|95px|0.9em| | + | {{main/i4|95px|0.9em|list of x86 processor families|'''<nowiki>[more...]</nowiki>'''}} |
− | |||
− | |||
|- | |- | ||
| colspan="2" | <hr> | | colspan="2" | <hr> | ||
|- | |- | ||
− | | rowspan="2" | [[File:mainpage arm chip.svg|link= | + | | rowspan="2" | [[File:mainpage arm chip.svg|link=|75px]] |
|- | |- | ||
| | | | ||
− | |||
− | |||
− | |||
{{main/i4|95px|0.9em|apple|'''Apple'''}} | {{main/i4|95px|0.9em|apple|'''Apple'''}} | ||
− | {{main/i4|95px|0.8em| | + | {{main/i4|95px|0.8em|ax|Ax}} |
− | {{main/i4|95px|0.9em| | + | {{main/i4|95px|0.9em|samsung|'''Samsung'''}} |
− | {{main/i4|95px|0.8em| | + | {{main/i4|95px|0.8em|samsung/exynos|Exynos}} |
− | {{main/i4|95px|0.9em| | + | {{main/i4|95px|0.9em|qualcomm|'''Qualcomm'''}} |
− | {{main/i4|95px|0.8em| | + | {{main/i4|95px|0.8em|qualcomm/snapdragon 200|Snapdragon 200}} |
− | {{main/i4|95px|0.8em| | + | {{main/i4|95px|0.8em|qualcomm/snapdragon 400|Snapdragon 400}} |
− | + | {{main/i4|95px|0.8em|qualcomm/snapdragon 600|Snapdragon 600}} | |
− | {{main/i4|95px|0.8em| | + | {{main/i4|95px|0.8em|qualcomm/snapdragon 800|Snapdragon 800}} |
− | {{main/i4|95px|0. | + | {{main/i4|95px|0.9em|mediatek|'''MediaTek'''}} |
− | + | {{main/i4|95px|0.8em|mediatek/helio|Helio}} | |
− | {{main/i4|95px|0.9em| | ||
− | {{main/i4|95px|0.8em| | ||
{{main/i4|95px|0.9em|marvell|'''Marvell'''}} | {{main/i4|95px|0.9em|marvell|'''Marvell'''}} | ||
{{main/i4|95px|0.8em|marvell/armada 7k|ARMADA 7K}} | {{main/i4|95px|0.8em|marvell/armada 7k|ARMADA 7K}} | ||
Line 73: | Line 57: | ||
{{main/i4|95px|0.8em|marvell/armada xp|ARMADA XP}} | {{main/i4|95px|0.8em|marvell/armada xp|ARMADA XP}} | ||
{{main/i4|95px|0.8em|marvell/armada xp|IAP140}} | {{main/i4|95px|0.8em|marvell/armada xp|IAP140}} | ||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
{{main/i4|95px|0.9em|stmicroelectronics|'''ST'''}} | {{main/i4|95px|0.9em|stmicroelectronics|'''ST'''}} | ||
{{main/i4|95px|0.8em|stmicroelectronics/stm32|STM32}} | {{main/i4|95px|0.8em|stmicroelectronics/stm32|STM32}} | ||
Line 97: | Line 62: | ||
{{main/i4|95px|0.8em|spreadtrum/SC7xxx xp|SC7xxx}} | {{main/i4|95px|0.8em|spreadtrum/SC7xxx xp|SC7xxx}} | ||
{{main/i4|95px|0.8em|spreadtrum/SC8xxx xp|SC8xxx}} | {{main/i4|95px|0.8em|spreadtrum/SC8xxx xp|SC8xxx}} | ||
− | {{main/i4|95px|0.8em|spreadtrum/SC9xxx xp|SC9xxx}}{{main/i4|95px|0.9em|ti|'''TI'''}} | + | {{main/i4|95px|0.8em|spreadtrum/SC9xxx xp|SC9xxx}} |
+ | {{main/i4|95px|0.9em|broadcom|'''Broadcom'''}} | ||
+ | {{main/i4|95px|0.8em|broadcom/stratagx|StrataGX}} | ||
+ | {{main/i4|95px|0.9em|nvidia|'''Nvidia'''}} | ||
+ | {{main/i4|95px|0.8em|nvidia/tegra|Tegra}} | ||
+ | {{main/i4|95px|0.9em|ti|'''TI'''}} | ||
{{main/i4|95px|0.8em|ti/omap|OMAP}} | {{main/i4|95px|0.8em|ti/omap|OMAP}} | ||
{{main/i4|95px|0.8em|ti/sitara|Sitara}} | {{main/i4|95px|0.8em|ti/sitara|Sitara}} | ||
Line 103: | Line 73: | ||
{{main/i4|95px|0.8em|ti/tiva c|Tiva C}} | {{main/i4|95px|0.8em|ti/tiva c|Tiva C}} | ||
{{main/i4|95px|0.8em|ti/c2000|C2000}} | {{main/i4|95px|0.8em|ti/c2000|C2000}} | ||
− | {{main/i4|95px|0.9em| | + | {{main/i4|95px|0.9em|apm|'''APM'''}} |
+ | {{main/i4|95px|0.8em|apm/x-gene|X-Gene}} | ||
+ | {{main/i4|95px|0.8em|apm/heliX|HeliX}} | ||
+ | {{main/i4|95px|0.9em|cavium|'''Cavium'''}} | ||
+ | {{main/i4|95px|0.8em|apm/thunderx|ThunderX}} | ||
+ | {{main/i4|95px|0.8em|apm/thunderx2|ThunderX2}} | ||
+ | {{main/i4|95px|0.9em|huawei|'''Huawei'''}} | ||
+ | {{main/i4|95px|0.8em|huawei/kirin|Kirin}} | ||
+ | {{main/i4|95px|0.9em|renesas|'''Renesas'''}} | ||
+ | {{main/i4|95px|0.8em|renesas/rz|RZ}} | ||
+ | {{main/i4|95px|0.9em|nxp|'''NXP'''}} | ||
+ | {{main/i4|95px|0.8em|nxp/qoriq|QorIQ}} | ||
+ | {{main/i4|95px|0.8em|nxp/lpc|LPC}} | ||
+ | {{main/i4|95px|0.8em|nxp/kinetis|Kinetis}} | ||
+ | {{main/i4|95px|0.9em|list of arm processor families|'''<nowiki>[more...]</nowiki>'''}} | ||
|- | |- | ||
| colspan="2" | <hr> | | colspan="2" | <hr> | ||
|- | |- | ||
− | | rowspan="2" | [[File:mainpage power chip.svg|link= | + | | rowspan="2" | [[File:mainpage power chip.svg|link=|75px]] |
|- | |- | ||
| | | | ||
− | |||
− | |||
− | |||
− | |||
{{main/i4|95px|0.9em|ibm|'''IBM'''}} | {{main/i4|95px|0.9em|ibm|'''IBM'''}} | ||
{{main/i4|95px|0.8em|ibm/power|POWER}} | {{main/i4|95px|0.8em|ibm/power|POWER}} | ||
Line 121: | Line 101: | ||
{{main/i4|95px|0.8em|nxp/qoriq|QorIQ}} | {{main/i4|95px|0.8em|nxp/qoriq|QorIQ}} | ||
{{main/i4|95px|0.8em|nxp/mpc5xxx|MPC5xxx}} | {{main/i4|95px|0.8em|nxp/mpc5xxx|MPC5xxx}} | ||
− | {{main/i4|95px|0.9em| | + | {{main/i4|95px|0.9em|list of power processor families|'''<nowiki>[more...]</nowiki>'''}} |
|- | |- | ||
| colspan="2" | <hr> | | colspan="2" | <hr> | ||
| | | | ||
|- | |- | ||
− | | rowspan="2" | [[File:mainpage mips chip.svg|link= | + | | rowspan="2" | [[File:mainpage mips chip.svg|link=|75px]] |
|- | |- | ||
| | | | ||
Line 133: | Line 113: | ||
{{main/i4|95px|0.8em|apm/octeon iii|OCTEON III}} | {{main/i4|95px|0.8em|apm/octeon iii|OCTEON III}} | ||
{{main/i4|95px|0.8em|apm/octeon tx|OCTEON TX}} | {{main/i4|95px|0.8em|apm/octeon tx|OCTEON TX}} | ||
− | {{main/i4|95px|0.9em| | + | {{main/i4|95px|0.9em|institute of computing technology|'''ICT'''}} |
− | {{main/i4|95px|0.8em| | + | {{main/i4|95px|0.8em|institute of computing technology/loongson|Loongson}} |
− | |||
− | |||
{{main/i4|95px|0.9em|niisi|'''NIISI'''}} | {{main/i4|95px|0.9em|niisi|'''NIISI'''}} | ||
{{main/i4|95px|0.8em|niisi/komdiv|KOMDIV-64}} | {{main/i4|95px|0.8em|niisi/komdiv|KOMDIV-64}} | ||
− | {{main/i4|95px|0.9em| | + | {{main/i4|95px|0.9em|list of mips processor families|'''<nowiki>[more...]</nowiki>'''}} |
|- | |- | ||
| colspan="2" | <hr> | | colspan="2" | <hr> | ||
|- | |- | ||
− | | rowspan="2" | [[File:mainpage sparc chip.svg|link= | + | | rowspan="2" | [[File:mainpage sparc chip.svg|link=|75px]] |
|- | |- | ||
| | | | ||
Line 149: | Line 127: | ||
{{main/i4|95px|0.8em|fujitsu/sparc64|SPARC64}} | {{main/i4|95px|0.8em|fujitsu/sparc64|SPARC64}} | ||
{{main/i4|95px|0.9em|oracle|'''Oracle'''}} | {{main/i4|95px|0.9em|oracle|'''Oracle'''}} | ||
− | {{main/i4|95px|0.8em|oracle/sparc| | + | {{main/i4|95px|0.8em|oracle/sparc m5|sparc M5}} |
− | {{main/i4|95px|0. | + | {{main/i4|95px|0.8em|oracle/sparc t5|sparc T5}} |
+ | {{main/i4|95px|0.8em|oracle/sparc m6|sparc M6}} | ||
+ | {{main/i4|95px|0.8em|oracle/sparc m7|sparc M7}} | ||
+ | {{main/i4|95px|0.8em|oracle/sparc s7|sparc S7}} | ||
+ | {{main/i4|95px|0.9em|list of sparc processor families|'''<nowiki>[more...]</nowiki>'''}} | ||
|- | |- | ||
| colspan="2" | <hr> | | colspan="2" | <hr> | ||
|- | |- | ||
− | | rowspan="2" | [[File:mainpage avr chip.svg|link= | + | | rowspan="2" | [[File:mainpage avr chip.svg|link=|75px]] |
|- | |- | ||
| | | | ||
Line 163: | Line 145: | ||
{{main/i4|95px|0.8em|atmel/megaavr|megaAVR}} | {{main/i4|95px|0.8em|atmel/megaavr|megaAVR}} | ||
{{main/i4|95px|0.8em|atmel/tinyavr|tinyAVR}} | {{main/i4|95px|0.8em|atmel/tinyavr|tinyAVR}} | ||
− | {{main/i4|95px|0.9em| | + | {{main/i4|95px|0.9em|list of avr processor families|'''<nowiki>[more...]</nowiki>'''}} |
|- | |- | ||
| colspan="2" | <hr> | | colspan="2" | <hr> | ||
|- | |- | ||
− | | rowspan="2" | [[File:mainpage pic chip.svg|link= | + | | rowspan="2" | [[File:mainpage pic chip.svg|link=|75px]] |
|- | |- | ||
| | | | ||
Line 176: | Line 158: | ||
{{main/i4|95px|0.8em|microchip technology/pic32|PIC32}} | {{main/i4|95px|0.8em|microchip technology/pic32|PIC32}} | ||
{{main/i4|95px|0.8em|microchip technology/dspic|dsPIC}} | {{main/i4|95px|0.8em|microchip technology/dspic|dsPIC}} | ||
− | {{main/i4|95px|0.9em| | + | {{main/i4|95px|0.9em|list of pic processor families|'''<nowiki>[more...]</nowiki>'''}} |
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
− | |||
|} | |} | ||
+ | </div> | ||
</div> | </div> |