Editing alchemy/au1250-700mgd (section)

== Cache ==
{{main|alchemy/microarchitectures/au1#Memory_Hierarchy|l1=Au1 § Cache}}
{{cache size
|l1 cache=32 KiB
|l1i cache=16 KiB
|l1i break=1 × 16 KiB
|l1i desc=4-way set associative
|l1d cache=16 KiB
|l1d break=1 × 16 KiB
|l1d desc=4-way set associative
|l1d policy=write-back
}}
base frequency	700 MHz (0.7 GHz, 700,000 kHz) +
core count	1 +
designer	RMI +
family	Alchemy +
full page name	alchemy/au1250-700mgd +
has ecc memory support	false +
instance of	microprocessor +
io voltage	3.3 V (33 dV, 330 cV, 3,300 mV) +
isa	MIPS32 +
l1$ size	32 KiB (32,768 B, 0.0313 MiB) +
l1d$ description	4-way set associative +
l1d$ size	16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description	4-way set associative +
l1i$ size	16 KiB (16,384 B, 0.0156 MiB) +
ldate	1900 +
market segment	Embedded +
max cpu count	1 +
max memory	512 MiB (524,288 KiB, 536,870,912 B, 0.5 GiB, 4.882812e-4 TiB) +
max memory bandwidth	1.739 GiB/s (1,780.51 MiB/s, 1.867 GB/s, 1,867 MB/s, 0.0017 TiB/s, 0.00187 TB/s) +
max memory channels	1 +
microarchitecture	Au1 +
model number	Au1250-700MGD +
name	Alchemy Au1250-700MGD +
part number	Au1250-700MGD +
smp max ways	1 +
supported memory type	DDR-400 + and DDR2-533 +
technology	CMOS +
word size	32 bit (4 octets, 8 nibbles) +