Editing alchemy/au1200-500mgc (section)

== Cache ==
{{main|alchemy/microarchitectures/au1#Memory_Hierarchy|l1=Au1 § Cache}}
{{cache size
|l1 cache=32 KiB
|l1i cache=16 KiB
|l1i break=1 × 16 KiB
|l1i desc=4-way set associative
|l1d cache=16 KiB
|l1d break=1 × 16 KiB
|l1d desc=4-way set associative
|l1d policy=write-back
}}
base frequency	500 MHz (0.5 GHz, 500,000 kHz) +
core count	1 +
core voltage	1.2 V (12 dV, 120 cV, 1,200 mV) +
core voltage tolerance	10% +
designer	AMD +
family	Alchemy +
first announced	January 3, 2005 +
first launched	May 2005 +
full page name	alchemy/au1200-500mgc +
has ecc memory support	false +
instance of	microprocessor +
io voltage	3.3 V (33 dV, 330 cV, 3,300 mV) +
isa	MIPS32 +
l1$ size	32 KiB (32,768 B, 0.0313 MiB) +
l1d$ description	4-way set associative +
l1d$ size	16 KiB (16,384 B, 0.0156 MiB) +
l1i$ description	4-way set associative +
l1i$ size	16 KiB (16,384 B, 0.0156 MiB) +
ldate	May 2005 +
market segment	Embedded +
max case temperature	343.15 K (70 °C, 158 °F, 617.67 °R) +
max cpu count	1 +
max memory	512 MiB (524,288 KiB, 536,870,912 B, 0.5 GiB, 4.882812e-4 TiB) +
max memory bandwidth	1.863 GiB/s (1,907.349 MiB/s, 2 GB/s, 2,000 MB/s, 0.00182 TiB/s, 0.002 TB/s) +
max memory channels	1 +
max storage temperature	398.15 K (125 °C, 257 °F, 716.67 °R) +
microarchitecture	Au1 +
min case temperature	273.15 K (0 °C, 32 °F, 491.67 °R) +
min storage temperature	233.15 K (-40 °C, -40 °F, 419.67 °R) +
model number	Au1200-500MGC +
name	Alchemy Au1200-500MGC +
part number	Au1200-500MGC +
smp max ways	1 +
supported memory type	DDR-400 + and DDR2-533 +
tdp	1.6 W (1,600 mW, 0.00215 hp, 0.0016 kW) +
technology	CMOS +
word size	32 bit (4 octets, 8 nibbles) +