Editing amd/epyc/75f3

{{amd title|EPYC 75F3}}
{{chip
|name=EPYC 75F3
|no image=Yes
|designer=AMD
|manufacturer=TSMC
|manufacturer 2=GlobalFoundries
|model number=75F3
|part number=100-000000313
|part number 2=100-100000313WOF
|market=Server
|first announced=January 12, 2021
|first launched=March 15, 2021
|last order=
|release price=$4,860
|family=EPYC
|series=7003
|locked=Yes
|frequency=2,950 MHz
|turbo frequency=4,000 MHz
|clock multiplier=29.5
|isa=x86-64
|isa family=x86
|microarch=Zen 3
|core name=Milan
|core family=25
|core model=1
|core stepping=B1
|process=7 nm+
|process 2=
|technology=CMOS
|mcp=Yes
|die count=9
|word size=64 bit
|core count=32
|thread count=64
|max cpus=2
|max memory=4 TiB
|tdp=280 W
|ctdp down=225 W
|package name 1=amd,socket_sp3
}}
'''EPYC 75F3''' is a {{arch|64}} [[32-core]] [[x86]] server microprocessor designed and introduced by [[AMD]] in March [[2021]]. This [[multi-chip package|multi-chip processor]], which is based on the {{amd|Zen 3|Zen 3 microarchitecture|l=arch}}, incorporates eight Core Complex Dies fabricated on a [[TSMC]] advanced [[7 nm process]] and a large I/O die manufactured by [[GlobalFoundries]]. The 75F3 has a TDP of 280 W with a base frequency of 2.95 MHz and a {{amd|precision boost|boost}} frequency of up to 4 MHz. This processor supports up to two-way [[symmetric multiprocessing|SMP]] and up to 4 TiB of eight channel DDR4-3200 memory per socket.

This is a frequency optimized SKU with high cache/core ratio, binned for high performance per core.
{{#set: part of=Frequency-optimized SKUs}}

== Cache ==
{{main|amd/microarchitectures/zen 3#Memory_Hierarchy|l1=Zen 3 § Cache}}
{{cache size
|l1 cache=2 MiB
|l1i cache=1 MiB
|l1i break=32 × 32 KiB
|l1i desc=8-way set associative
|l1d cache=1 MiB
|l1d break=32 × 32 KiB
|l1d desc=8-way set associative
|l1d policy=write-back
|l2 cache=16 MiB
|l2 break=32 × 512 KiB
|l2 desc=8-way set associative
|l2 policy=write-back
|l3 cache=256 MiB
|l3 break=8 × 32 MiB
}}

== Memory controller ==
{{main|amd/cores/milan#Memory Interface|l1=Milan § Memory Interface}}
{{memory controller
|type=DDR4-3200
|ecc=Yes
|max mem=4 TiB
|controllers=8
|channels=8
|max bandwidth=190.73 GiB/s
|bandwidth schan=23.84 GiB/s
|bandwidth dchan=47.68 GiB/s
|bandwidth qchan=95.37 GiB/s
|bandwidth hchan=143.05 GiB/s
|bandwidth ochan=190.73 GiB/s
}}

== Expansions ==
{{main|amd/cores/milan#Input/Output Interfaces|l1=Milan § I/O Interfaces}}
{{expansions main
|
{{expansions entry
|type=PCIe
|pcie revision=4.0
|pcie lanes=128
}}
{{expansions entry
|type=SATA
|sata revision=3.0
|sata ports=32
}}
{{expansions entry
|type=USB
|usb revision=3.1
|usb ports=4
}}
}}

== Features ==
{{x86 features
|real=Yes
|protected=Yes
|smm=Yes
|fpu=Yes
|x8616=Yes
|x8632=Yes
|x8664=Yes
|nx=Yes
|mmx=Yes
|emmx=Yes
|sse=Yes
|sse2=Yes
|sse3=Yes
|ssse3=Yes
|sse41=Yes
|sse42=Yes
|sse4a=Yes
|sse_gfni=No
|avx=Yes
|avx_gfni=No
|avx2=Yes
|avx512f=No
|avx512cd=No
|avx512er=No
|avx512pf=No
|avx512bw=No
|avx512dq=No
|avx512vl=No
|avx512ifma=No
|avx512vbmi=No
|avx5124fmaps=No
|avx512vnni=No
|avx5124vnniw=No
|avx512vpopcntdq=No
|avx512gfni=No
|avx512vaes=No
|avx512vbmi2=No
|avx512bitalg=No
|avx512vpclmulqdq=No
|abm=Yes
|tbm=No
|bmi1=Yes
|bmi2=Yes
|fma3=Yes
|fma4=No
|aes=Yes
|rdrand=Yes
|sha=Yes
|xop=No
|adx=Yes
|clmul=Yes
|f16c=Yes
|bfloat16=No
|tbt1=No
|tbt2=No
|tbmt3=No
|tvb=No
|bpt=No
|eist=No
|sst=No
|flex=No
|fastmem=No
|ivmd=No
|intelnodecontroller=No
|intelnode=No
|kpt=No
|ptt=No
|intelrunsure=No
|mbe=No
|isrt=No
|sba=No
|mwt=No
|sipp=No
|att=No
|ipt=No
|tsx=No
|txt=No
|ht=No
|vpro=No
|vtx=No
|vtd=No
|ept=No
|mpx=No
|sgx=No
|securekey=No
|osguard=No
|intqat=No
|dlboost=No
|3dnow=No
|e3dnow=No
|smartmp=No
|powernow=No
|amdvi=Yes
|amdv=Yes
|amdsme=Yes
|amdtsme=Yes
|amdsev=Yes
|rvi=No
|smt=Yes
|sensemi=Yes
|xfr=No
|xfr2=No
|mxfr=No
|amdpb=No
|amdpb2=No
|amdpbod=No
}}

== References ==
* [https://ir.amd.com/news-events/press-releases/detail/993/amd-epyc-7003-series-cpus-set-new-standard-as-highest "AMD EPYC™ 7003 Series CPUs Set New Standard as Highest Performance Server Processor"] (Press release). AMD.com. March 15, 2021. Retrieved May 2021.
* {{cite techdoc|title=AMD EPYC™ 7003 Series Processors: The New Standard for the Modern Datacenter|url=https://www.amd.com/system/files/documents/amd-epyc-7003-series-datasheet.pdf|publ=AMD|pid=LE-77202|rev=00|date=2021-02}}
* [https://www.amd.com/en/partner/processor-specifications "AMD Processor Specifications"]. AMD.com. Retrieved May 2021.
* [https://www.amd.com/en/products/cpu/amd-epyc-75f3 "AMD EPYC™ 75F3"]. AMD.com. Retrieved May 2021.
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	EPYC 75F3 - AMD#pcie +
base frequency	2,950 MHz (2.95 GHz, 2,950,000 kHz) +
clock multiplier	29.5 +
core count	32 +
core family	25 +
core model	1 +
core name	Milan +
core stepping	B1 +
designer	AMD +
die count	9 +
family	EPYC +
first announced	January 12, 2021 +
first launched	March 15, 2021 +
full page name	amd/epyc/75f3 +
has advanced vector extensions	true +
has advanced vector extensions 2	true +
has amd amd-v technology	true +
has amd amd-vi technology	true +
has amd secure encrypted virtualization technology	true +
has amd secure memory encryption technology	true +
has amd sensemi technology	true +
has amd transparent secure memory encryption technology	true +
has ecc memory support	true +
has feature	Advanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension + and SenseMI Technology +
has locked clock multiplier	true +
has simultaneous multithreading	true +
has x86 advanced encryption standard instruction set extension	true +
instance of	microprocessor +
is multi-chip package	true +
isa	x86-64 +
isa family	x86 +
l1$ size	2,048 KiB (2,097,152 B, 2 MiB) +
l1d$ description	8-way set associative +
l1d$ size	1,024 KiB (1,048,576 B, 1 MiB) +
l1i$ description	8-way set associative +
l1i$ size	1,024 KiB (1,048,576 B, 1 MiB) +
l2$ description	8-way set associative +
l2$ size	16 MiB (16,384 KiB, 16,777,216 B, 0.0156 GiB) +
l3$ description	16-way set associative +
l3$ size	256 MiB (262,144 KiB, 268,435,456 B, 0.25 GiB) +
ldate	March 15, 2021 +
manufacturer	TSMC + and GlobalFoundries +
market segment	Server +
max cpu count	2 +
max memory	4,194,304 MiB (4,294,967,296 KiB, 4,398,046,511,104 B, 4,096 GiB, 4 TiB) +
max memory bandwidth	190.73 GiB/s (195,307.52 MiB/s, 204.795 GB/s, 204,794.778 MB/s, 0.186 TiB/s, 0.205 TB/s) +
max memory channels	8 +
max sata ports	32 +
max usb ports	4 +
microarchitecture	Zen 3 +
model number	75F3 +
name	EPYC 75F3 +
package	FCLGA-4094 + and SP3 +
part number	100-000000313 + and 100-100000313WOF +
part of	Frequency-optimized SKUs +
release price	$ 4,860.00 (€ 4,374.00, £ 3,936.60, ¥ 502,183.80) +
series	7003 +
smp max ways	2 +
socket	LGA-4094 + and SP3 +
supported memory type	DDR4-3200 +
tdp	280 W (280,000 mW, 0.375 hp, 0.28 kW) +
tdp down	225 W (225,000 mW, 0.302 hp, 0.225 kW) +
technology	CMOS +
thread count	64 +
turbo frequency	4,000 MHz (4 GHz, 4,000,000 kHz) +
word size	64 bit (8 octets, 16 nibbles) +