Editing fairchild/100k

{{fairchild title|100K}}
{{ic family
| title             = Fairchild 100K
| image             = 
| caption           = 
| no image          = Yes
| developer         = Fairchild
| manufacturer      = Fairchild
| type              = Discrete Logic
| first announced   = 
| first launched    = 1975
| proc              = 
| tech              = ECL
| clock min         = 
| clock max         = 
| package           = 
| package 2         = 
| package 3         = 

| succession       = Yes
| predecessor      = 10K
| predecessor link = fairchild/10k
| successor        = 
| successor link   = 
}}
'''Fairchild 100K''' ('''F-100K'''; '''100xxx''') was a family of very high-speed [[discrete logic chips]] and {{arch|8}} [[bit-slice]] chips introduced by [[Fairchild Semiconductor]] in the mid-1970s but did not reach high availability until the early 1980s. This series was implemented using [[emitter-coupled logic]] (ECL) making those chips considerably faster than comparable [[Schottky TTL]]-based chips. The 100K family were an improved version of the 10K which was originally introduced by [[Motorola]] and was later also manufactured by Fairchild. Many early high-speed systems and [[supercomputers]] made use of those chips. 

== Overview ==
In the mid-1970s Fairchild introduced the 100K which was an improved version of the original 10K family. The new family had a lower supply voltage of around ~4.5 V from 5.2 V as well as considerably faster propagation delay (e.g., down to 0.75ns from 2ns). Additionally, the 100K family made use of a larger package (DIP-24 vs DIP-16 for most components).

100K-based parts found their way into many early high-performance systems. For example, the [[Floating Point Systems]] {{fps|FPS-264}} {{arch|64}} [[floating-point]] co-processor which was introduced in February [[1985]] performed 4 to 5 times faster than its predecessor, {{fps|FPS-164}}, by simply switching to 100K series [[ECL]] chips from [[Schottky TTL]]; this was all done without making any architectural changes and maintaining 100% software compatibility.

Making use of ECL meant system designers were confronted with high power consumption which reduced the usefulness of those chips. It's part of the reason why most systems that used those chips only used them where high speed was vitality needed and even then expensive special cooling was often needed.

== Members ==
{{empty section}}

=== Bit-slice parts ===
{{see also|bit-slice microprocessor|fairchild/f220|l2=F220}}
In April 1980 Fairchild introduced an expansion to the standard discrete logic chips, the {{fairchild|F220}} (10022x) series of micro-programmed {{arch|8}} [[bit-slice]] chips. The sub-family was composed of 5 chips featuring 1,000-gate density and sub-nanosecond delays.

{| class="wikitable"
|-
! Part !! Description 
|-
| {{\\|100220}} || Address and Data Interface Unit (ADIU)
|-
| {{\\|100221}} || Multi-Function Network (MFN)
|-
| {{\\|100222}} || Dual Access Stack (DAS)
|-
| {{\\|100223}} || Programmable Interface Unit (PIU)
|-
| {{\\|100224}} || Microprogram Sequencer (MPS)
|}

== Systems ==
* 1981: [[Control Data Corporation]] {{cdc|Cyber 205}} used 100K series chips for its [[microcode]] memory logic boards
* 1983: [[UC Berkeley]] [[Big RISC]] (BRISC) supercomputer was made entirely of 100K parts
* 1985: [[Floating Point Systems]] {{fps|FPS-264}} FP Coprocessor
* 1980s: [[Digital Equipment Corporation]] {{decc|VAX 8000}} minicomputers used 100K series parts for various components such as the clock phase generator
{{expand list}}

== Documents ==
* [[:File:fairchild 100k ad.pdf|Fairchild 100K Ad announcing 8-bit slice chips]]

{{DEFAULTSORT:100K}}
[[Category:fairchild]]
[[Category:8-bit microprocessors]]
[[Category:microprocessor families]]
designer	Fairchild +
first launched	1973 +
full page name	fairchild/100k +
instance of	integrated circuit family +
main designer	Fairchild +
manufacturer	Fairchild +
name	Fairchild 100K +
technology	ECL +