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Display titleXeon Gold 5218R - Intel
Default sort keyXeon Gold 5218R, Intel
Page length (in bytes)3,669
Page ID35940
Page content languageEnglish (en)
Page content modelwikitext
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Page creatorDavid (talk | contribs)
Date of page creation22:45, 27 February 2020
Latest editorDavid (talk | contribs)
Date of latest edit02:34, 28 February 2020
Total number of edits10
Total number of distinct authors1
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Retrieved from "https://en.wikichip.org/wiki/intel/xeon_gold/5218r"
Facts about "Xeon Gold 5218R - Intel"
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Xeon Gold 5218R - Intel#pcie +
base frequency2,100 MHz (2.1 GHz, 2,100,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipsetLewisburg +
clock multiplier21 +
core count20 +
core family6 +
core model85 +
core nameCascade Lake R +
designerIntel +
familyXeon Gold +
first announcedFebruary 24, 2020 +
first launchedFebruary 24, 2020 +
full page nameintel/xeon gold/5218r +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has advanced vector extensions 512true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions + and Deep Learning Boost +
has intel deep learning boosttrue +
has intel enhanced speedstep technologytrue +
has intel speed shift technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size1,280 KiB (1,310,720 B, 1.25 MiB) +
l1d$ description8-way set associative +
l1d$ size640 KiB (655,360 B, 0.625 MiB) +
l1i$ description8-way set associative +
l1i$ size640 KiB (655,360 B, 0.625 MiB) +
l2$ description16-way set associative +
l2$ size20 MiB (20,480 KiB, 20,971,520 B, 0.0195 GiB) +
l3$ description11-way set associative +
l3$ size27.5 MiB (28,160 KiB, 28,835,840 B, 0.0269 GiB) +
ldateFebruary 24, 2020 +
main imageFile:cascade lake sp (front).png +
manufacturerIntel +
market segmentServer +
max case temperature360.15 K (87 °C, 188.6 °F, 648.27 °R) +
max cpu count2 +
max memory1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) +
max memory bandwidth119.21 GiB/s (122,071.04 MiB/s, 128.001 GB/s, 128,000.763 MB/s, 0.116 TiB/s, 0.128 TB/s) +
max memory channels6 +
microarchitectureCascade Lake +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number5218R +
nameXeon Gold 5218R +
number of avx-512 execution units1 +
packageFCLGA-3647 +
platformPurley +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 1,273.00 (€ 1,145.70, £ 1,031.13, ¥ 131,539.09) + and $ 1,280.00 (€ 1,152.00, £ 1,036.80, ¥ 132,262.40) +
release price (box)$ 1,280.00 (€ 1,152.00, £ 1,036.80, ¥ 132,262.40) +
release price (tray)$ 1,273.00 (€ 1,145.70, £ 1,031.13, ¥ 131,539.09) +
series6200 +
smp interconnectUPI +
smp interconnect links2 +
smp interconnect rate10.4 GT/s +
smp max ways2 +
socketSocket P + and LGA-3647 +
supported memory typeDDR4-2666 +
tdp125 W (125,000 mW, 0.168 hp, 0.125 kW) +
technologyCMOS +
thread count40 +
turbo frequency (1 core)4,000 MHz (4 GHz, 4,000,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +