Semiconductor & Computer Engineering
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Information for "intel/xeon"
Basic information
| Display title | Xeon - Intel |
| Default sort key | Xeon, Intel |
| Page length (in bytes) | 13,277 |
| Page ID | 658 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 4 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | 65.78.114.251 (talk) |
| Date of page creation | 00:37, 7 February 2014 |
| Latest editor | 194.191.233.93 (talk) |
| Date of latest edit | 12:37, 22 December 2018 |
| Total number of edits | 30 |
| Total number of distinct authors | 4 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (12) | Templates used on this page:
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Facts about "Xeon - Intel"
| designer | Intel + |
| first announced | June 29, 1998 + |
| first launched | 1998 + |
| full page name | intel/xeon + |
| instance of | microprocessor extended family + |
| instruction set architecture | x86-64 + |
| main designer | Intel + |
| manufacturer | Intel + |
| microarchitecture | P6 +, NetBurst +, Core +, Penryn +, Nehalem +, Westmere +, Sandy Bridge +, Ivy Bridge +, Haswell +, Broadwell + and Skylake + |
| name | Xeon + |
| process | 350 nm (0.35 μm, 3.5e-4 mm) +, 250 nm (0.25 μm, 2.5e-4 mm) +, 180 nm (0.18 μm, 1.8e-4 mm) +, 65 nm (0.065 μm, 6.5e-5 mm) +, 45 nm (0.045 μm, 4.5e-5 mm) +, 32 nm (0.032 μm, 3.2e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) + |
