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Difference between revisions of "amd/k6-2/k6-2-366afk"
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{{amd title|K6-2/366AFK}}
 
{{amd title|K6-2/366AFK}}
{{mpu
+
{{chip
 
| name                = K6-2/366AFK
 
| name                = K6-2/366AFK
 
| no image            = No
 
| no image            = No
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| manufacturer        = AMD
 
| manufacturer        = AMD
 
| model number        = K6-2/366AFK
 
| model number        = K6-2/366AFK
| part number        = K6-2/366AFK
+
| part number        = AMD-K6-2/366AFK
| part number 1      =
 
 
| part number 2      =  
 
| part number 2      =  
 
| part number 3      =  
 
| part number 3      =  
 +
| part number 4      =
 
| market              = Mobile
 
| market              = Mobile
 
| first announced    = March 22, 1999
 
| first announced    = March 22, 1999
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| thread count        = 1
 
| thread count        = 1
 
| max cpus            = 1
 
| max cpus            = 1
| max memory          = 4 GB
+
| max memory          = 4 GiB
 +
 
  
| electrical          = Yes
 
 
| power              =  
 
| power              =  
 
| v core              = 2.2 V
 
| v core              = 2.2 V
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}}
 
}}
 
'''K6-2/366AFK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.25 µm process]], this MPU operated at 366 MHz with a [[FSB]] operating at 66 MHz.
 
'''K6-2/366AFK''' was a {{arch|32}} [[x86]] {{amd|microarchitectures/k6-2|K6-2}}-based mobile microprocessor designed and manufactured in [[1999]] by [[AMD]]. Manufactured using a [[0.25 µm process]], this MPU operated at 366 MHz with a [[FSB]] operating at 66 MHz.
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== Cache ==
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{{main|amd/microarchitectures/k6-2#Memory_Hierarchy|l1=K6-2 § Cache}}
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[[L2$]] can be 512 KiB to 1 MiB, depending on manufacturer and [[motherboard]] model. L2$ is off-chip.
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{{cache info
 +
|l1i cache=32 KiB
 +
|l1i break=1x32 KiB
 +
|l1i desc=2-way set associative
 +
|l1i extra=
 +
|l1d cache=32 KiB
 +
|l1d break=1x32 KiB
 +
|l1d desc=2-way set associative
 +
|l1d extra=
 +
|l2 cache=
 +
|l2 break=
 +
|l2 desc=
 +
|l2 extra=
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|l3 cache=
 +
|l3 break=
 +
|l3 desc=
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|l3 extra=
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}}
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 +
== Graphics ==
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This SoC has no integrated graphics processing unit.
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 +
== Features ==
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{{x86 features
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| mmx  = true
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| 3dnow = true
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}}
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* Auto-power down state
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* Stop clock state
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== Documents ==
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=== DataSheet ===
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* [[:File:Mobile AMD-K6-2 Processor Data Sheet (May, 2000).pdf|Mobile AMD-K6-2 Processor Data Sheet]]; Publication #21896 Revision E/0, May 2000

Latest revision as of 16:08, 13 December 2017

Edit Values
K6-2/366AFK
General Info
DesignerAMD
ManufacturerAMD
Model NumberK6-2/366AFK
Part NumberAMD-K6-2/366AFK
MarketMobile
IntroductionMarch 22, 1999 (announced)
March 22, 1999 (launched)
ShopAmazon
General Specs
FamilyK6-2
SeriesK6-2 Mobile P
Frequency366.66 MHz
Bus typeFSB
Bus speed66.66 MHz
Bus rate66.66 MT/s
Clock multiplier5.5
CPUID58C
Microarchitecture
MicroarchitectureK6-2
PlatformSuper 7
Core NameChomper Extended
Core Family5
Core Model8
Core Stepping12
Process0.25 µm
Transistors9,300,000
TechnologyCMOS
Die81 mm²
Word Size32 bit
Cores1
Threads1
Max Memory4 GiB
Multiprocessing
Max SMP1-Way (Uniprocessor)
Electrical
Vcore2.2 V ± 0.1 V
VI/O3.3675 V ± 7%
Tcase0 °C – 80 °C
Tstorage-65 °C – 150 °C

K6-2/366AFK was a 32-bit x86 K6-2-based mobile microprocessor designed and manufactured in 1999 by AMD. Manufactured using a 0.25 µm process, this MPU operated at 366 MHz with a FSB operating at 66 MHz.

Cache[edit]

Main article: K6-2 § Cache

L2$ can be 512 KiB to 1 MiB, depending on manufacturer and motherboard model. L2$ is off-chip.

Cache Info [Edit Values]
L1I$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative
L1D$ 32 KiB
32,768 B
0.0313 MiB
1x32 KiB 2-way set associative

Graphics[edit]

This SoC has no integrated graphics processing unit.

Features[edit]

  • Auto-power down state
  • Stop clock state

Documents[edit]

DataSheet[edit]

Facts about "K6-2/366AFK - AMD"
l1d$ description2-way set associative +
l1i$ description2-way set associative +