Semiconductor & Computer Engineering
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Difference between revisions of "intel/xeon e3/e3-1240 v5"
| Line 114: | Line 114: | ||
| bandwidth dchan = | | bandwidth dchan = | ||
| max memory = 64 GB | | max memory = 64 GB | ||
| + | }} | ||
| + | |||
| + | == Expansions == | ||
| + | {{mpu expansions | ||
| + | | pcie revision = 3.0 | ||
| + | | pcie lanes = 16 | ||
| + | | pcie config = 1x16 | ||
| + | | pcie config 1 = 2x8 | ||
| + | | pcie config 2 = 1x8+2x4 | ||
| + | | usb revision = | ||
| + | | usb revision 2 = | ||
| + | | usb revision N = | ||
| + | | usb ports = | ||
| + | | sata ports = | ||
| + | | integrated lan = | ||
| + | | uart = | ||
}} | }} | ||
Revision as of 12:11, 4 May 2016
Template:mpu The Xeon E3-1240 V5 is an entry-level workstations and servers 64-bit x86 quad-core microprocessor introduced by Intel in October 2015. This Skylake-based chip operates at 3.5 GHz with turbo boost of 3.9 GHz. The E3-1240 V5 has a TDP of 80 Watts and supports up to 64 GB of dual-channel DDR3/4. This MPU has no integrated graphics processor.
Contents
Cache
- Main article: Skylake § Cache
| Cache Info [Edit Values] | ||
| L1I$ | 128 KB "KB" is not declared as a valid unit of measurement for this property. |
4x32 KB 8-way set associative (per core, write-back) |
| L1D$ | 128 KB "KB" is not declared as a valid unit of measurement for this property. |
4x32 KB 8-way set associative (per core, write-back) |
| L2$ | 1 MB "MB" is not declared as a valid unit of measurement for this property. |
4x256 KB 4-way set associative (per core) |
| L3$ | 8 MB "MB" is not declared as a valid unit of measurement for this property. |
4x2 MB |
Graphics
This chip has no integrated graphics processing unit.
Memory controller
| Integrated Memory Controller | |
| Type | DDR3L-1333, DDR3L-1600, DDR3L-RS1333, DDR3L-RS1600, DDR4-1866, DDR4-2133, DDR4-RS1866, DDR4-RS2133 |
| Controllers | 1 |
| Channels | 2 |
| ECC Support | Yes |
| Max bandwidth | 34.1 GB/s |
| Max memory | 64 GB |
Expansions
Facts about "Xeon E3-1240 v5 - Intel"
| l1d$ description | 8-way set associative + |
| l1i$ description | 8-way set associative + |
| l2$ description | 4-way set associative + |