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Difference between revisions of "65 nm lithography process"

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{{lithography processes}}
 
{{lithography processes}}
 
The '''65 nm lithography process''' is a [[technology node|full node]] semiconductor manufacturing process following the [[80 nm lithography process|80 nm process]] stopgap. Commercial [[integrated circuit]] manufacturing using 65 nm process began in 2006. This technology was superseded by the [[55 nm lithography process|55 nm process]] (HN) / [[45 nm lithography process|45 nm process]] (FN) in 2007.
 
The '''65 nm lithography process''' is a [[technology node|full node]] semiconductor manufacturing process following the [[80 nm lithography process|80 nm process]] stopgap. Commercial [[integrated circuit]] manufacturing using 65 nm process began in 2006. This technology was superseded by the [[55 nm lithography process|55 nm process]] (HN) / [[45 nm lithography process|45 nm process]] (FN) in 2007.
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== Industry ==
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=== Intel ===
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{| class="wikitable"
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|-
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| || Measurement || Scaling from [[90 nm]]
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|-
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| Contacted Gate Pitch || 220 nm || 0.85x
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|-
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| Interconnect Pitch (M1P) || 210 nm || 0.95x
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|-
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| [[SRAM]] bit cell || 0.570 µm<sup>2</sup> || 0.61x
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|}
  
 
== 65 nm Microprocessors==
 
== 65 nm Microprocessors==

Revision as of 19:58, 23 April 2016

The 65 nm lithography process is a full node semiconductor manufacturing process following the 80 nm process stopgap. Commercial integrated circuit manufacturing using 65 nm process began in 2006. This technology was superseded by the 55 nm process (HN) / 45 nm process (FN) in 2007.

Industry

Intel

Measurement Scaling from 90 nm
Contacted Gate Pitch 220 nm 0.85x
Interconnect Pitch (M1P) 210 nm 0.95x
SRAM bit cell 0.570 µm2 0.61x

65 nm Microprocessors

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65 nm System on Chips

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65 nm Microarchitectures

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