Semiconductor & Computer Engineering
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Information for "nvidia/microarchitectures/denver"
Basic information
| Display title | Denver - Microarchitectures - Nvidia |
| Default sort key | Denver, Nvidia |
| Page length (in bytes) | 5,788 |
| Page ID | 30340 |
| Page content language | English (en) |
| Page content model | wikitext |
| Indexing by robots | Allowed |
| Number of redirects to this page | 1 |
| Counted as a content page | Yes |
| Number of subpages of this page | 0 (0 redirects; 0 non-redirects) |
Page protection
| Edit | Allow all users (infinite) |
| Move | Allow all users (infinite) |
Edit history
| Page creator | A5b (talk | contribs) |
| Date of page creation | 12:48, 16 June 2018 |
| Latest editor | 193.137.92.138 (talk) |
| Date of latest edit | 09:10, 11 February 2020 |
| Total number of edits | 21 |
| Total number of distinct authors | 5 |
| Recent number of edits (within past 90 days) | 0 |
| Recent number of distinct authors | 0 |
Page properties
| Transcluded templates (10) | Templates used on this page:
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Facts about "Denver - Microarchitectures - Nvidia"
| codename | Denver + |
| core count | 2 + |
| designer | Nvidia + |
| first launched | 2014 + |
| full page name | nvidia/microarchitectures/denver + |
| instance of | microarchitecture + |
| instruction set architecture | ARMv8 + |
| l1$ size | 384 KiB (393,216 B, 0.375 MiB) + |
| l1d$ description | 4-way set associative + |
| l1d$ size | 128 KiB (131,072 B, 0.125 MiB) + |
| l1i$ description | 4-way set associative + |
| l1i$ size | 256 KiB (262,144 B, 0.25 MiB) + |
| l2$ description | 16-way set associative + |
| l2$ size | 2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) + |
| manufacturer | TSMC + |
| microarchitecture type | CPU + |
| name | Denver + |
| process | 28 nm (0.028 μm, 2.8e-5 mm) + and 16 nm (0.016 μm, 1.6e-5 mm) + |
