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From WikiChip
File:sandy bridge register file shared strength and post silicon tuning.png
Size of this preview: 800 × 344 pixels. Other resolutions: 320 × 137 pixels | 873 × 375 pixels.
Original file (873 × 375 pixels, file size: 168 KB, MIME type: image/png)
Summary[edit]
A technique used in Intel's Sandy Bridge in order to reduce the minimum voltage required. Tuning also includes three resistors for post-silicon tuning.
Licensing[edit]
This work is copyrighted (or assumed to be copyrighted) and unlicensed. However, it is believed that the use of this work qualifies as fair use under United States copyright law. |
File history
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Date/Time | Thumbnail | Dimensions | User | Comment | |
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current | 13:28, 22 September 2017 | 873 × 375 (168 KB) | David (talk | contribs) | A technique used in Intel's {{intel|Sandy Bridge|l=arch}} in order to reduce the minimum voltage required. Tuning also includes three resistors for post-silicon tuning. |
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Horizontal resolution | 37.8 dpc |
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Vertical resolution | 37.8 dpc |
File change date and time | 17:27, 22 September 2017 |