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File:sandy bridge register file shared strength and post silicon tuning.png

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Summary[edit]

A technique used in Intel's Sandy Bridge in order to reduce the minimum voltage required. Tuning also includes three resistors for post-silicon tuning.

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Date/TimeThumbnailDimensionsUserComment
current13:28, 22 September 2017Thumbnail for version as of 13:28, 22 September 2017873 × 375 (168 KB)David (talk | contribs)A technique used in Intel's {{intel|Sandy Bridge|l=arch}} in order to reduce the minimum voltage required. Tuning also includes three resistors for post-silicon tuning.
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Metadata

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Horizontal resolution 37.8 dpc
Vertical resolution 37.8 dpc
File change date and time 17:27, 22 September 2017
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