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Difference between revisions of "zhaoxin/microarchitectures/zhangjiang"
< zhaoxin

(Key changes from {{via|Isaiah II|l=arch}})
(New instructions)
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* {{x86|SM3|<code>SM3</code>}} - [[Hardware acceleration]] for SM3 hashing operations
 
* {{x86|SM3|<code>SM3</code>}} - [[Hardware acceleration]] for SM3 hashing operations
* {{x86|SM4|<code>SM4</code>}} - [[Hardware acceleration]] for SM4 hashing operations
+
* {{x86|SM4|<code>SM4</code>}} - Hardware acceleration for SM4 hashing operations
  
 
== Die ==
 
== Die ==
 
* TSMC's [[28 nm process]]
 
* TSMC's [[28 nm process]]
 
* 300,000,000 transistors
 
* 300,000,000 transistors

Revision as of 00:45, 27 May 2018

Edit Values
ZhangJiang µarch
General Info
Arch TypeCPU
DesignerZhaoxin
ManufacturerTSMC
Introduction2015
Process28 nm
Core Configs2, 4, 8
Pipeline
TypeSuperscalar
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAx86-64
Succession

ZhangJiang is the successor to Isaiah II, a 28 nm x86 microarchitecture designed by Zhaoxin for mainstream laptops, desktops, and servers.

Brands

Family Series Description
KaiXian C/C+ (4000) Desktop, Laptops
Kaisheng C+ (4000) Storage, Servers

Process Technology

WuDaoKou is manufactured on TSMC's 28 nm process.

Architecture

It is believed that this architecture is largely based on VIA's Isaiah II.

Key changes from Isaiah II

This list is incomplete; you can help by expanding it.

New instructions

ZhangJiang introduced a number of new instructions:

Die

codenameZhangJiang +
core count2 +, 4 + and 8 +
designerZhaoxin +
first launched2015 +
full page namezhaoxin/microarchitectures/zhangjiang +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerTSMC +
microarchitecture typeCPU +
nameZhangJiang +
process28 nm (0.028 μm, 2.8e-5 mm) +