Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "zero register"
(zero reg) |
|||
| Line 4: | Line 4: | ||
== Overview == | == Overview == | ||
The zero register is a [[special-purpose register|special]] [[register]] that is hard-wired to the integer value <code>0</code>. This register is found in many [[RISC]] instruction set architectures such as [[MIPS]] and [[RISC-V]]. On those architectures writing to that register is always discarded and reading its value will always result in a <code>0</code> being read. | The zero register is a [[special-purpose register|special]] [[register]] that is hard-wired to the integer value <code>0</code>. This register is found in many [[RISC]] instruction set architectures such as [[MIPS]] and [[RISC-V]]. On those architectures writing to that register is always discarded and reading its value will always result in a <code>0</code> being read. | ||
| + | |||
| + | |||
| + | {{stub}} | ||
Latest revision as of 03:04, 12 December 2017
A zero register refers to a special-purpose register that is hardwired to the integer constant 0.
Overview[edit]
The zero register is a special register that is hard-wired to the integer value 0. This register is found in many RISC instruction set architectures such as MIPS and RISC-V. On those architectures writing to that register is always discarded and reading its value will always result in a 0 being read.
 |
This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information. |
