Semiconductor & Computer Engineering
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Difference between revisions of "verilog/example modules"
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! Module !! Description | ! Module !! Description | ||
|- | |- | ||
| − | | {{\|Adder}} || | + | | {{\|Adder}} || Adder is the part of IC that performs addition of numbers. It is essential part of every IC |
|- | |- | ||
| − | | {{\|ALU}} || | + | | {{\|Multiplexer(MUX)}} || MUX is the part of the circuit part that chooses output of multiple inputs |
| + | |- | ||
| + | | {{\|ALU}} || ALU is part of IC that performs arithmetic operations | ||
|- | |- | ||
! colspan="2" | Counters | ! colspan="2" | Counters | ||
Latest revision as of 06:39, 21 April 2018
Basics
Language
Gate Level Modeling
Behavioral Modeling
- Always Block
- Procedural Assignments
- Continuous Assignments
- Conditional Statement
- Case Statement
- Looping Statements
- Looping Statements
Testing
Modules
- Modules
- Example Modules
Below is a list of example modules.
Examples[edit]
| Module | Description |
|---|---|
| Adder | Adder is the part of IC that performs addition of numbers. It is essential part of every IC |
| Multiplexer(MUX) | MUX is the part of the circuit part that chooses output of multiple inputs |
| ALU | ALU is part of IC that performs arithmetic operations |
| Counters | |
| 8-bit counter | |
| LFSR counter | |
| Memory | |
| Single-port RAM | |
| Dual-port RAM | |
