Information for "renesas/r-car/h3 (sip)"

Basic information

Display title	R-Car H3 (SiP) - Renesas
Default sort key	R-Car H3 (SiP), Intel
Page length (in bytes)	3,709
Page ID	21375
Page content language	English (en)
Page content model	wikitext
Indexing by robots	Allowed
Number of redirects to this page	6
Counted as a content page	Yes
Number of subpages of this page	0 (0 redirects; 0 non-redirects)

Edit	Allow all users (infinite)
Move	Allow all users (infinite)

Page creator	BCD (talk \| contribs)
Date of page creation	02:38, 23 July 2017
Latest editor	ChippyBot (talk \| contribs)
Date of latest edit	16:32, 13 December 2017
Total number of edits	12
Total number of distinct authors	2
Recent number of edits (within past 90 days)	0
Recent number of distinct authors	0

Transcluded templates (18)	Templates used on this page: Template:\\ (edit) Template:arch (view source) (protected) Template:arm features (edit) Template:armh (edit) Template:cache size (view source) (protected) Template:chip (view source) (protected) Template:imgtec (edit) Template:integrated graphics (edit) Template:istrue (view source) (protected) Template:link-armh (edit) Template:link-imagination technologies (edit) Template:main (view source) (protected) Template:memory controller (edit) Template:packages/renesas/fcbga-1255 (edit) Template:renesas title (edit) Template:url parse anchor (view source) (protected) Template:url parse article (view source) (protected) Module:chip (view source)

Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.	R-Car H3 (SiP) - Renesas#package +
core count	9 +
core name	Cortex-A53 +, Cortex-A57 + and Cortex-R7 +
core voltage	0.8 V (8 dV, 80 cV, 800 mV) +
designer	Renesas + and ARM Holdings +
die area	111.36 mm² (0.173 in², 1.114 cm², 111,360,000 µm²) +
die length	12.94 mm (1.294 cm, 0.509 in, 12,940 µm) +
die width	8.61 mm (0.861 cm, 0.339 in, 8,610 µm) +
family	R-Car +
first announced	December 2, 2015 +
first launched	March 2018 +
full page name	renesas/r-car/h3 (sip) +
has ecc memory support	false +
instance of	microprocessor +
integrated gpu	PowerVR GX6650 +
integrated gpu designer	Imagination Technologies +
io voltage	3.3 V (33 dV, 330 cV, 3,300 mV) +
isa	ARMv8 +
isa family	ARM +
l1$ size	640 KiB (655,360 B, 0.625 MiB) +
l1d$ size	288 KiB (294,912 B, 0.281 MiB) +
l1i$ size	352 KiB (360,448 B, 0.344 MiB) +
l2$ size	2.5 MiB (2,560 KiB, 2,621,440 B, 0.00244 GiB) +
ldate	March 2018 +
main image	+
manufacturer	TSMC +
market segment	Embedded +
max cpu count	1 +
max memory bandwidth	47.68 GiB/s (48,824.32 MiB/s, 51.196 GB/s, 51,196.01 MB/s, 0.0466 TiB/s, 0.0512 TB/s) +
max memory channels	4 +
microarchitecture	Cortex-A53 +, Cortex-A57 + and Cortex-R7 +
model number	H3 (SiP) +
name	R-Car H3 (SiP) +
package	FCBGA-1255 +
part number	R8J77950 +
process	16 nm (0.016 μm, 1.6e-5 mm) +
series	3rd Gen +
smp max ways	1 +
supported memory type	LPDDR4-3200 +
technology	CMOS +
thread count	9 +
word size	64 bit (8 octets, 16 nibbles) +