Semiconductor & Computer Engineering
From WikiChip
Difference between revisions of "power"
| (2 intermediate revisions by 2 users not shown) | |||
| Line 1: | Line 1: | ||
| − | {{power isa main}} | + | {{title|POWER}}{{power isa main}} |
| − | '''POWER''' is a [[bi-endian]] (traditionally [[big-endian]]) [[instruction set architecture]]. The architecture was developed by [[IBM]] and has some use in [[server]] markets. The architecture was | + | '''POWER''' is a [[RISC]], [[bi-endian]] (traditionally [[big-endian]]) [[instruction set architecture]]. The architecture was developed by [[IBM]] and has some use in [[server]] markets. The architecture was also derived into [[PowerPC]] for use in home computers , such as Apple's PowerMac lineup. |
== History == | == History == | ||
| − | + | The POWER architecture first made it's debut in 1990 with the original (POWER1) architecture. It was originally known as the RISC System/6000 architecture. | |
== Overview == | == Overview == | ||
| Line 32: | Line 32: | ||
{{stub}} | {{stub}} | ||
| + | |||
| + | [[Category:instruction set architectures]] | ||
[[designer::IBM| ]] | [[designer::IBM| ]] | ||
Latest revision as of 07:30, 21 July 2018
POWER
Instruction Set Architecture
Instruction Set Architecture
POWER is a RISC, bi-endian (traditionally big-endian) instruction set architecture. The architecture was developed by IBM and has some use in server markets. The architecture was also derived into PowerPC for use in home computers , such as Apple's PowerMac lineup.
Contents
History[edit]
The POWER architecture first made it's debut in 1990 with the original (POWER1) architecture. It was originally known as the RISC System/6000 architecture.
Overview[edit]
 |
This section is empty; you can help add the missing info by editing this page. |
Registers[edit]
| |
This section is empty; you can help add the missing info by editing this page. |
Operation Modes[edit]
| |
This section is empty; you can help add the missing info by editing this page. |
Instruction Set[edit]
| |
This section is empty; you can help add the missing info by editing this page. |
Syntaxes[edit]
| |
This section is empty; you can help add the missing info by editing this page. |
Interrupts[edit]
| |
This section is empty; you can help add the missing info by editing this page. |
Extensions[edit]
| |
This section is empty; you can help add the missing info by editing this page. |
Implementations[edit]
| |
This section is empty; you can help add the missing info by editing this page. |
See also[edit]
 |
This article is still a stub and needs your attention. You can help improve this article by editing this page and adding the missing information. |
4 octets
8 nibbles
8 nibbles
8 octets
16 nibbles
16 nibbles
Facts about "POWER"
| design | Von Neumann + |
| designer | IBM + |
| dev model | consortium + |
| endianness | Bi-endian + |
| first launched | 1992 + |
| format | Register-Register + |
| full page name | POWER + |
| name | POWER + |
| word size | 32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) + |
