From WikiChip
Difference between revisions of "phytium/microarchitectures/mars ii"
< phytium

(Die)
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== Die ==
 
== Die ==
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* [[16 nm process]] (16FF+) GL
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* 1 [[polysilicon layer|Poly]], 11 [[Metal layers]], [[RDL]]
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* 6,000,000,000 [[transistors]]
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* 370 mm² [[die size]]
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:[[File:mars ii die.png|600px]]
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:[[File:mars ii die (annotated).png|600px]]
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:[[File:mars ii die 2.png|600px]]

Revision as of 18:39, 18 February 2019

Edit Values
Mars II µarch
General Info
Arch TypeCPU
DesignerPhytium
ManufacturerTSMC
Introduction2019
Process16 nm
Core Configs64
Pipeline
TypeSuperscalar, Pipelined
OoOEYes
SpeculativeYes
Reg RenamingYes
Instructions
ISAARMv8
Succession

Mars II is the successor to Mars I, an ARM server SoC microarchitecture designed by Phytium Technology for the Chinese server market.

Process technology

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Architecture

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Overview

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Die


mars ii die.png


mars ii die (annotated).png


mars ii die 2.png
codenameMars II +
core count64 +
designerPhytium +
first launched2019 +
full page namephytium/microarchitectures/mars ii +
instance ofmicroarchitecture +
instruction set architectureARMv8 +
manufacturerTSMC +
microarchitecture typeCPU +
nameMars II +
process16 nm (0.016 μm, 1.6e-5 mm) +