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{{nvidia title|NVLink}}
 
{{nvidia title|NVLink}}
 
'''NVLink''' is a proprietary system [[interconnect architecture]] that facilitates [[memory coherence|coherent]] data and control transmission accross multiple [[Nvidia]] [[GPU]]s and supporting [[CPU]]s.
 
'''NVLink''' is a proprietary system [[interconnect architecture]] that facilitates [[memory coherence|coherent]] data and control transmission accross multiple [[Nvidia]] [[GPU]]s and supporting [[CPU]]s.
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== Overview ==
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Announced in early 2014, NVLink was designed as an alternative solution to [[PCI Express]] with higher bandwidth and additional features specifically designed for multi-GPU systems.
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== NVLink 1.0 ==
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NVLink 1.0 was first introduced with the {{nvidia|GP100}} [[GPGPU]] based on the {{nvidia|Pascal|l=arch}} microarchitecture. [[IBM]] also added support it with {{ibm|POWER8+|l=arch}}.
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== NVLink 2.0 ==
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NVLink 2.0 was first introduced with the {{nvidia|V100}} [[GPGPU]] based on the {{nvidia|Volta|l=arch}} microarchitecture along with [[IBM]]'s {{ibm|POWER9|l=arch}}.

Revision as of 22:46, 3 May 2018

NVLink is a proprietary system interconnect architecture that facilitates coherent data and control transmission accross multiple Nvidia GPUs and supporting CPUs.

Overview

Announced in early 2014, NVLink was designed as an alternative solution to PCI Express with higher bandwidth and additional features specifically designed for multi-GPU systems.

NVLink 1.0

NVLink 1.0 was first introduced with the GP100 GPGPU based on the Pascal microarchitecture. IBM also added support it with POWER8+.

NVLink 2.0

NVLink 2.0 was first introduced with the V100 GPGPU based on the Volta microarchitecture along with IBM's POWER9.