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|designer=NUDT | |designer=NUDT | ||
|model number=Matrix-2000 | |model number=Matrix-2000 | ||
− | |first announced= | + | |first announced=2016 |
|first launched=2017 | |first launched=2017 | ||
|frequency=1,200 MHz | |frequency=1,200 MHz | ||
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== Architecture == | == Architecture == | ||
− | The Matrix-2000 consists 128 [[physical cores|cores]], eight [[DDR4]] memory channels, and x16 PCIe lanes. The chip consists of four supernodes (SN) consisting of 32 cores each operating at 1.2 GHz with a peak power dissipation of 240 Watts. | + | The Matrix-2000 consists 128 [[physical cores|cores]], eight [[DDR4]] memory channels, and x16 PCIe lanes. The chip consists of four supernodes (SN) consisting of 32 cores each operating at 1.2 GHz with a peak power dissipation of 240 Watts. At 1 GHz the chip consumes 200 W peak. |
::[[File:matrix-2000.svg|600px]] | ::[[File:matrix-2000.svg|600px]] |
Facts about "Matrix-2000 - NUDT"
Has subobject "Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki. | Matrix-2000 - NUDT#package + |
base frequency | 1,200 MHz (1.2 GHz, 1,200,000 kHz) + |
core count | 128 + |
designer | NUDT + |
first announced | 2015 + |
first launched | 2017 + |
full page name | nudt/matrix-2000 + |
has ecc memory support | true + |
instance of | microprocessor + |
ldate | 2017 + |
main image | + |
main image caption | Matrix-2000, package front + |
max memory bandwidth | 143.1 GiB/s (146,534.4 MiB/s, 153.652 GB/s, 153,652.455 MB/s, 0.14 TiB/s, 0.154 TB/s) + |
max memory channels | 8 + |
model number | Matrix-2000 + |
name | Matrix-2000 + |
package | FCCLGA-4201 + |
power dissipation | 240 W (240,000 mW, 0.322 hp, 0.24 kW) + |
supported memory type | DDR4-2400 + |
technology | CMOS + |
thread count | 128 + |
word size | 64 bit (8 octets, 16 nibbles) + |