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|-
 
|-
! Mnemonic !! OPCode !! Bytes !! Cycles !! Meaning !! Skip Condition
+
! Mnemonic !! OPCode !! Bytes !! Cycles !! Function !! Meaning !! Skip Condition
 
|-
 
|-
| CLA || || 1 || 1 || A<sub>CC</sub> ← 0 ||
+
| CLA || 90 || 1 || 1 || A<sub>CC</sub> ← 0 || Clear accumulator ||
 
|-
 
|-
| CMA || || 1 ||  
+
| CMA || 10 || 1 || 1 || A<sub>CC</sub> ← ~A<sub>CC</sub> || 1-s complement accumulator ||  
 
|-
 
|-
| CIA || || 1 ||  
+
| CIA || 11 || 1 || 1 || A<sub>CC</sub> ← ~A<sub>CC</sub> + 1 || 2-s complement accumulator || 
 
|-
 
|-
| INC || || 1 ||  
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| INC || 0D || 1 || 1 + skip || A<sub>CC</sub> ← A<sub>CC</sub> + 1 || Increment accumulator, skip if overflow || on overflow
 
|-
 
|-
| DEC || || 1 ||  
+
| DEC || 0F || 1 || 1 + skip || A<sub>CC</sub> ← A<sub>CC</sub> - 1 || Decrement accumulator, skip if underflow || on underflow
 
|-
 
|-
| CLC || || 1 ||  
+
| CLC || 0B || 1 || 1 || C ← 0 || Clear carry flag ||  
 
|-
 
|-
| STC || || 1 ||  
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| STC || 1B || 1 || 1 || C ← 1 || Set carry flag ||  
 
|- style="background: #ccffcc;"
 
|- style="background: #ccffcc;"
| XC || || 1 ||  
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| XC || 1A || 1 || 1 || C ↔ C' || Exchange carry flag with carry save ||
 
|- style="background: #ccffcc;"
 
|- style="background: #ccffcc;"
| RAR || || 1 ||  
+
| RAR || 30 || 1 || 1 || C → A<sub>CC</sub> → C || Rotate accumulator right through carry flag ||  
 
|- style="background: #ccffcc;"
 
|- style="background: #ccffcc;"
| INM || || 1 ||  
+
| INM || 1D || 1 || 1 + skip || (DP) = (DP) + 1 || Increment RAM location pointed by DP, skip if result is zero || on (DP) = 0
 
|- style="background: #ccffcc;"
 
|- style="background: #ccffcc;"
| DEM || || 1 ||  
+
| DEM || 1F || 1 || 1 + skip || (DP) = (DP) - 1 || Decrement RAM location pointed by DP, skip if result is 0Fh || on (DP) = 0Fh
 
|-
 
|-
 
| AD || || 1 ||  
 
| AD || || 1 ||  

Revision as of 07:09, 21 July 2018

The μCOM-4 ISA was an instruction set architecture composed of 80 instructions that were implemented by the NEC in their μCOM-4 family of microcontrollers. The μCOM-43 family implemented the complete ISA, while the μCOM-44 and μCOM-45 families implemented a strict subset of it. (Note that the μCOM-42 family had its own instruction set.)

Block diagram

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Registers

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Features

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Instructions

The μCOM-43 has support for all 80 instructions. The μCOM-44/μCOM-45 support a strict subset of it composed of 58 instruction. The majority of those 22 instructions deal with the added features only found in the μCOM-43 models.

Mnemonic OPCode Bytes Cycles Function Meaning Skip Condition
CLA 90 1 1 ACC ← 0 Clear accumulator
CMA 10 1 1 ACC ← ~ACC 1-s complement accumulator
CIA 11 1 1 ACC ← ~ACC + 1 2-s complement accumulator
INC 0D 1 1 + skip ACC ← ACC + 1 Increment accumulator, skip if overflow on overflow
DEC 0F 1 1 + skip ACC ← ACC - 1 Decrement accumulator, skip if underflow on underflow
CLC 0B 1 1 C ← 0 Clear carry flag
STC 1B 1 1 C ← 1 Set carry flag
XC 1A 1 1 C ↔ C' Exchange carry flag with carry save
RAR 30 1 1 C → ACC → C Rotate accumulator right through carry flag
INM 1D 1 1 + skip (DP) = (DP) + 1 Increment RAM location pointed by DP, skip if result is zero on (DP) = 0
DEM 1F 1 1 + skip (DP) = (DP) - 1 Decrement RAM location pointed by DP, skip if result is 0Fh on (DP) = 0Fh
AD 1
ADS 1
ADC 1
DAA 1
DAS 1
EXL 1
LI 1
S 1
L 1
LM 1
X 1
XM 1
XD 1
XMD 1
XI 1
XMI 1
LDI 2
LDZ 1
DED 1
IND 1
TAL 1
TLA 1
XHX 1
XLY 1
THX 1
TLY 1
XAZ 1
XAW 1
TAZ 1
TAW 1
XHR 1
XLS 1
SMB 1
RMB 1
TMB 1
TAB 1
CMB 1
SFB 1
RFB 1
FBT 1
FBF 1
CM 1
CI 2
CLI 2
TC 1
TIT 1
JCP 1
JMP 2
JPA 1
EI 1
DI 1
CZP 1
CAL 2
RT 1
RTS 1
STM 2
TTM 1
SEB 1
REB 1
SPB 1
RPB 1
TPA 1
TPB 1
OE 1
OP 1
OCD 2 2 PORT[C,D] ← I7-I0
IA 2 2 ACC ← PORT[A]
IP 1 1 ACC ← PORT[DPL]
NOP 1 1 no operation

  - μCOM-43 only

Documents

See also