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SHAVE µarch
General Info
Arch Type	DSP
Designer	Movidius
Manufacturer	TSMC
Introduction	2011
Pipeline
Type	VLIW

Streaming Hybrid Architecture Vector Engine (SHAVE) is a hybrid microarchitecture designed by Movidius for their vision processors. SHAVE is incorporated into Movidius Myriad family of vision processors.

Architecture

• Hybrid RISC-DSP-GPU VLIW architecture
• Predicated execution
• Branch delay slots
• Tailored to streaming workloads
• 128-bit vector arithmetic
  • 8/16/32-bit integer
  • 16/32-bit floating point
• Full support for sparse data structures (matrix/array, random access)

Instruction Set

SHAVE supports a mixture of many different types of instructions belonging to a number of different classes of architectures.

• RISC style
  • Instruction predication
  • Large set of integer operations
  • C-compiler support
• VLIW style
  • Parallel functional units controlled by VLIW instructions
  • 8/16/32-bit x 1-4 SIMD int
• DSP style
  • Zero overhead looping
  • Modulo addressing
  • Transparent DMA modes
  • FFT, Viterbi, etc..
  • Parallel comparisons
• GPU style
  • Streaming operations
  • 16/32-bit FP operations
  • Texture management unit