Semiconductor & Computer Engineering
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<tr class="comptable-header"><th> </th><th colspan="12">List of ARMADA 600-based Processors</th></tr> | <tr class="comptable-header"><th> </th><th colspan="12">List of ARMADA 600-based Processors</th></tr> | ||
<tr class="comptable-header"><th> </th><th colspan="7">Main processor</th><th colspan="8">IGP</th></tr> | <tr class="comptable-header"><th> </th><th colspan="7">Main processor</th><th colspan="8">IGP</th></tr> | ||
| − | {{comp table header 1|cols=Process, Launched, C, T, Frequency, Memory, Max Mem, Name, Frequency}} | + | {{comp table header 1|cols=Process, Launched, C, T, Frequency, Memory, Max Mem, Developer, Name, Frequency}} |
{{#ask: [[Category:microprocessor models by marvell]] [[instance of::microprocessor]] [[microprocessor family::ARMADA 600]] | {{#ask: [[Category:microprocessor models by marvell]] [[instance of::microprocessor]] [[microprocessor family::ARMADA 600]] | ||
|?full page name | |?full page name | ||
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|?supported memory type | |?supported memory type | ||
|?max memory#GiB | |?max memory#GiB | ||
| + | |?integrated gpu designer | ||
|?integrated gpu | |?integrated gpu | ||
|?integrated gpu base frequency#MHz | |?integrated gpu base frequency#MHz | ||
|format=template | |format=template | ||
|template=proc table 3 | |template=proc table 3 | ||
| − | |userparam= | + | |userparam=12 |
|mainlabel=- | |mainlabel=- | ||
}} | }} | ||
Latest revision as of 10:46, 29 May 2017
| ARMADA | |
| Developer | Marvell |
| Manufacturer | TSMC |
| Type | System on Chips |
| Introduction | October 19, 2009 (announced) November, 2009 (launch) |
| Architecture | Consumer ARM-based SoCs |
| ISA | ARMv5, ARMv6, ARMv7 |
| µarch | Sheeva PJ1, Sheeva PJ4 |
| Word size | 32 bit 4 octets
8 nibbles |
| Process | 55 nm 0.055 μm
5.5e-5 mm |
| Technology | CMOS |
| Succession | |
| ← | |
| PXA | |
ARMADA is a family of consumer application 32-bit ARM system on chips introduced by Marvell in late 2009 as a successor to the older PXA family which was acquired from Intel.
Contents
Series[edit]
ARMADA 100[edit]
ARMADA 100 was a series of 32-bit ARM SoCs designed by Marvell for ultra-low power consumer devices such as digital photo frames, eBook readers, MIDs, IP phones, and portable navigation devices. ARMADA 100 devices are all based on Marvell's Sheeva PJ1 microarchitecture manufactured on a 55 nm process.
ARMADA 500[edit]
ARMADA 500 was a series of 32-bit ARM SoCs designed by Marvell for high-performance consumer devices such smartbooks, MIDs, netbooks, and thin clients. ARMADA 500 devices are all based on Marvell's Sheeva PJ4 microarchitecture manufactured on a 55 nm process.
ARMADA 600[edit]
ARMADA 600 was a series of 32-bit ARM SoCs designed by Marvell for high-performance consumer mobile devices smartphones, point of sale terminals, handheld multimedia devices, and MIDs. ARMADA 600 devices are all based on Marvell's Sheeva PJ4 microarchitecture manufactured on a 55 nm process.
| List of ARMADA 600-based Processors | |||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Main processor | IGP | ||||||||||||||
| Model | Process | Launched | C | T | Frequency | Memory | Max Mem | Developer | Name | Frequency | |||||
| 610 | 55 nm 0.055 μm 5.5e-5 mm | 5 January 2010 | 1 | 1 | 1 GHz 1,000 MHz 1,000,000 kHz | DDR2-800 DDR3-1066 | 2 GiB 2,048 MiB 2,097,152 KiB 2,147,483,648 B 0.00195 TiB | Vivante | GC860 | ||||||
| 618 | 55 nm 0.055 μm 5.5e-5 mm | 16 February 2010 | 1 | 1 | 1 GHz 1,000 MHz 1,000,000 kHz | DDR3-1066 DDR2-800 | 2 GiB 2,048 MiB 2,097,152 KiB 2,147,483,648 B 0.00195 TiB | Vivante | GC860 | ||||||
| 628 | 55 nm 0.055 μm 5.5e-5 mm | March 2011 | 3 | 3 | 1.5 GHz 1,500 MHz 0.624 GHz1,500,000 kHz 624 MHz 624,000 kHz | DDR3-1066 DDR2-800 | Vivante | GC1000 | 500 MHz 0.5 GHz 500,000 KHz | ||||||
| Count: 3 | |||||||||||||||
ARMADA 1000[edit]
ARMADA 1500[edit]
See also[edit]
- Intel Atom
| designer | Marvell + |
| first announced | October 19, 2009 + |
| first launched | November 2009 + |
| full page name | marvell/armada + |
| instance of | system on a chip family + |
| instruction set architecture | ARMv5 +, ARMv6 + and ARMv7 + |
| main designer | Marvell + |
| manufacturer | TSMC + |
| microarchitecture | Sheeva PJ1 + and Sheeva PJ4 + |
| name | ARMADA + |
| process | 55 nm (0.055 μm, 5.5e-5 mm) + |
| technology | CMOS + |
| word size | 32 bit (4 octets, 8 nibbles) + |
