A MAJ5 can be naively described as the OR of 10 MAJ3 gates. It can be simplified down to 10 AND gates and 9 OR gates by rewriting the terms.<ref>Ralph L. DeCarli (2009). [https://www.sysmatrix.net/~omnivore/MajorityGate.html The Majority Gate]</ref> This is probably optimal, since the optimal sorting network of 5 terms has 9 comparisons.

The majority gate (MAJ gate) is a logic gate that implements the majority function - a device that outputs a HIGH when the majority of its inputs are HIGH, otherwise it outputs a LOW.

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MAJ3

A 3-input MAJ gate (MAJ3) can be implemented as .

CMOS

However the naive implementation will result in up to 30 transistors. Since

,

we can define MAJ3 as

and that can be implemented using a single AOI222 which is defined as

note that by substituting a, b, and c for d, e, and f we get MAJ:

It can also be implemented using a OAI222 gate the very same way. Since

,

then

MAJ5

A MAJ5 can be naively described as the OR of 10 MAJ3 gates. It can be simplified down to 10 AND gates and 9 OR gates by rewriting the terms.^{[1]} This is probably optimal, since the optimal sorting network of 5 terms has 9 comparisons.