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Godson-2H - Loongson
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Godson-2H
godson-2h.jpg
Godson-2H chip
General Info
DesignerLoongson
ManufacturerSTMicroelectronics
Model Number2H
MarketDesktop
IntroductionAugust, 2010 (announced)
March, 2011 (launched)
General Specs
FamilyGodson 2
SeriesGodson 2
Frequency1,000 MHz
Bus typeHyperTransport 1.03
Bus speed800 MHz
Microarchitecture
ISAMIPS64 (MIPS)
MicroarchitectureGS464V
Core NameGS464V
Process65 nm
Transistors152,000,000
TechnologyCMOS
Die117 mm²
Word Size64 bit
Cores1
Threads1
Max CPUs1 (Uniprocessor)
Electrical
Power dissipation10 W

Godson-2H (龙芯2H) is a 64-bit MIPS performance processor developed by ICT and later Loongson for desktop computers. Introduced in late-2010, the Godson-2H operates at up to 1 GHz consuming up to 10 W. This chip was manufactured on STMicroelectronics' 65 nm process.

The Godson-2H is actually a complete system on a chip incorporating the northbridge along with the southbridge on-die. Additionally the Godson-2H also incorporates a low-power Vivante GC800 IGP operating at 400 MHz.

In addition to a standalone SoC, the Godson-2H can also operate in slave-mode serving as a cooperative southbridge to the more powerful Godson 3 multi-core processor family.

Cache

Main article: GS464V § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$128 KiB
0.125 MiB
131,072 B
1.220703e-4 GiB
L1I$64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB4-way set associative 
L1D$64 KiB
0.0625 MiB
65,536 B
6.103516e-5 GiB
1x64 KiB4-way set associative 

L2$512 KiB
0.5 MiB
524,288 B
4.882812e-4 GiB
  1x512 KiB4-way set associative 

Memory controller

[Edit/Modify Memory Info]

ram icons.svg
Integrated Memory Controller
Max TypeDDR3-800
Supports ECCYes
Max Mem4 GiB
Controllers1
Channels1
Max Bandwidth11.92 GiB/s
20.741 GB/s
12,206.08 MiB/s
0.0116 TiB/s
0.0128 TB/s
Bandwidth
Single 11.92 GiB/s

Graphics

[Edit/Modify IGP Info]

screen icon.svg
Integrated Graphics Information
GPUGC800
DesignerVivante
Execution Units4
Frequency400 MHz
0.4 GHz
400,000 KHz
OutputVGA, SDVO, CRT

Max Resolution
DSI1920x1080
VGA1920x1080

Standards
DirectX11
OpenGL3.0
OpenCL1.1
OpenGL ES2.0

Expansions

This chip has integrated HyperTransport 1.03 operating at 200, 400, or 800 MHz.

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision2.0
Max Lanes4
Configs1x4, 4x1
USB
Revision2.0
Ports6
SATA
Revision2
Ports2
LPC
Revision1.1
I²C
Ports2

GP I/O16 lines
JTAGYes

Networking

[Edit/Modify Network Info]

ethernet plug icon.svg
Networking
MII
RGMIIYes

Die Shot

godson-2h die shot.png

References

  • Xiao, Bin, et al. "Godson-2H: a complex low power SOC in 65nm CMOS." Circuits and Systems (MWSCAS), 2012 IEEE 55th International Midwest Symposium on. IEEE, 2012.
  • Loongson Technology, "龙芯芯片产品技术白皮书" ("Godson chip product technology white paper")
Facts about "Godson-2H - Loongson"
base frequency1,000 MHz (1 GHz, 1,000,000 kHz) +
bus speed800 MHz (0.8 GHz, 800,000 kHz) +
bus typeHyperTransport 1.03 +
core count1 +
core nameGS464V +
designerLoongson +
die area117 mm² (0.181 in², 1.17 cm², 117,000,000 µm²) +
familyGodson 2 +
first announcedAugust 2010 +
first launchedMarch 2011 +
full page nameloongson/godson 2/2h +
has ecc memory supporttrue +
instance ofmicroprocessor +
integrated gpuGC800 +
integrated gpu base frequency400 MHz (0.4 GHz, 400,000 KHz) +
integrated gpu designerVivante +
isaMIPS64 +
isa familyMIPS +
l1$ size0.125 MiB (128 KiB, 131,072 B, 1.220703e-4 GiB) +
l1d$ description4-way set associative +
l1d$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
l1i$ description4-way set associative +
l1i$ size0.0625 MiB (64 KiB, 65,536 B, 6.103516e-5 GiB) +
l2$ description4-way set associative +
l2$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
ldateMarch 2011 +
main imageFile:godson-2h.jpg +
main image captionGodson-2H chip +
manufacturerSTMicroelectronics +
market segmentDesktop +
max cpu count1 +
max memory bandwidth11.92 GiB/s (20.741 GB/s, 12,206.08 MiB/s, 0.0116 TiB/s, 0.0128 TB/s) +
max memory channels1 +
max pcie lanes4 +
microarchitectureGS464V +
model number2H +
nameGodson-2H +
power dissipation10 W (10,000 mW, 0.0134 hp, 0.01 kW) +
process65 nm (0.065 μm, 6.5e-5 mm) +
seriesGodson 2 +
supported memory typeDDR3-800 +
technologyCMOS +
thread count1 +
transistor count152,000,000 +
word size64 bit (8 octets, 16 nibbles) +