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=== 4200-Series (Cascade Lake) === | === 4200-Series (Cascade Lake) === | ||
− | {{see also|intel/microarchitectures/cascade lake | + | {{see also|intel/microarchitectures/cascade lake|l1=Cascade Lake µarch}} |
Second-generation Xeon Scalable Silver was introduced in early 2019. Those processors are fabricated on an enhanced [[14 nm process]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture which allows for higher clock speeds and introduced a {{intel|Cascade Lake#Key changes from Skylake|l=arch|number of}} hardware changes against the various [[speculative execution]] [[side channel analysis|vulnerabilities]]. Those processors also introduced new {{x86|AVX-512 VNNI|new instructions}} for the [[acceleration]] of machine learning (inference) as well as support for [[persistent memory]]. All 4200-series Xeon Silver processors support: | Second-generation Xeon Scalable Silver was introduced in early 2019. Those processors are fabricated on an enhanced [[14 nm process]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture which allows for higher clock speeds and introduced a {{intel|Cascade Lake#Key changes from Skylake|l=arch|number of}} hardware changes against the various [[speculative execution]] [[side channel analysis|vulnerabilities]]. Those processors also introduced new {{x86|AVX-512 VNNI|new instructions}} for the [[acceleration]] of machine learning (inference) as well as support for [[persistent memory]]. All 4200-series Xeon Silver processors support: | ||
Facts about "Xeon Silver - Intel"
designer | Intel + |
first announced | May 4, 2017 + |
first launched | July 11, 2017 + |
full page name | intel/xeon silver + |
instance of | microprocessor family + |
instruction set architecture | x86-64 + |
main designer | Intel + |
manufacturer | Intel + |
microarchitecture | Skylake + |
name | Xeon Silver + |
package | FCLGA-3647 + |
process | 14 nm (0.014 μm, 1.4e-5 mm) + |
socket | LGA-3647 + |
technology | CMOS + |
word size | 64 bit (8 octets, 16 nibbles) + |