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Display titleXeon Gold 6252N - Intel
Default sort keyXeon Gold 6252N, Intel
Page length (in bytes)5,405
Page ID33080
Page content languageEnglish (en)
Page content modelwikitext
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Number of redirects to this page7
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Page creatorDavid (talk | contribs)
Date of page creation16:52, 3 April 2019
Latest editorDavid (talk | contribs)
Date of latest edit02:18, 29 December 2019
Total number of edits9
Total number of distinct authors1
Recent number of edits (within past 90 days)0
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Xeon Gold 6252N - Intel#pcie +
base frequency2,300 MHz (2.3 GHz, 2,300,000 kHz) +
bus links4 +
bus rate8,000 MT/s (8 GT/s, 8,000,000 kT/s) +
bus typeDMI 3.0 +
chipsetLewisburg +
clock multiplier23 +
core count24 +
core family6 +
core model85 +
core nameCascade Lake SP +
core steppingB1 +
designerIntel +
familyXeon Gold +
first announcedApril 2, 2019 +
first launchedApril 2, 2019 +
full page nameintel/xeon gold/6252n +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has advanced vector extensions 512true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Vector Extensions 512 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Speed Shift Technology +, Trusted Execution Technology +, Intel vPro Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions + and Deep Learning Boost +
has intel deep learning boosttrue +
has intel enhanced speedstep technologytrue +
has intel speed shift technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vpro technologytrue +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size1.5 MiB (1,536 KiB, 1,572,864 B, 0.00146 GiB) +
l1d$ description8-way set associative +
l1d$ size0.75 MiB (768 KiB, 786,432 B, 7.324219e-4 GiB) +
l1i$ description8-way set associative +
l1i$ size0.75 MiB (768 KiB, 786,432 B, 7.324219e-4 GiB) +
l2$ description16-way set associative +
l2$ size24 MiB (24,576 KiB, 25,165,824 B, 0.0234 GiB) +
l3$ description11-way set associative +
l3$ size35.75 MiB (36,608 KiB, 37,486,592 B, 0.0349 GiB) +
ldateApril 2, 2019 +
main imageFile:cascade lake sp (front).png +
manufacturerIntel +
market segmentServer +
max case temperature347.15 K (74 °C, 165.2 °F, 624.87 °R) +
max cpu count4 +
max memory1,048,576 MiB (1,073,741,824 KiB, 1,099,511,627,776 B, 1,024 GiB, 1 TiB) +
max memory bandwidth131.13 GiB/s (228.166 GB/s, 134,277.12 MiB/s, 0.128 TiB/s, 0.141 TB/s) +
max memory channels6 +
microarchitectureCascade Lake +
min case temperature273.15 K (0 °C, 32 °F, 491.67 °R) +
model number6252N +
nameXeon Gold 6252N +
packageFCLGA-3647 +
platformPurley +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 4,259.00 (€ 3,833.10, £ 3,449.79, ¥ 440,082.47) +
release price (tray)$ 4,259.00 (€ 3,833.10, £ 3,449.79, ¥ 440,082.47) +
s-spec (qs)QS1W +
series6200 +
smp interconnectUPI +
smp interconnect links3 +
smp interconnect rate10.4 GT/s +
smp max ways4 +
socketSocket P + and LGA-3647 +
supported memory typeDDR4-2933 +
tdp150 W (150,000 mW, 0.201 hp, 0.15 kW) +
technologyCMOS +
thread count48 +
turbo frequency (1 core)3,600 MHz (3.6 GHz, 3,600,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +