Latest revision |
Your text |
Line 1: |
Line 1: |
| {{intel title|Xeon Gold 6146}} | | {{intel title|Xeon Gold 6146}} |
− | {{chip | + | {{mpu}} |
− | |name=Xeon Gold 6146
| |
− | |image=skylake sp (basic).png
| |
− | |designer=Intel
| |
− | |manufacturer=Intel
| |
− | |model number=6146
| |
− | |s-spec qs=QN7C
| |
− | |market=Server
| |
− | |first announced=July 11, 2017
| |
− | |first launched=July 11, 2017
| |
− | |release price=$3286.00
| |
− | |family=Xeon Gold
| |
− | |series=6100
| |
− | |locked=Yes
| |
− | |frequency=3,200 MHz
| |
− | |turbo frequency1=4,200 MHz
| |
− | |clock multiplier=32
| |
− | |isa=x86-64
| |
− | |isa family=x86
| |
− | |microarch=Skylake (server)
| |
− | |platform=Purley
| |
− | |chipset=Lewisburg
| |
− | |core name=Skylake SP
| |
− | |core family=6
| |
− | |core stepping=H0
| |
− | |process=14 nm
| |
− | |technology=CMOS
| |
− | |word size=64 bit
| |
− | |core count=12
| |
− | |thread count=24
| |
− | |max memory=768 GiB
| |
− | |max cpus=4
| |
− | |smp interconnect=UPI
| |
− | |smp interconnect links=3
| |
− | |smp interconnect rate=10.4 GT/s
| |
− | |tdp=165 W
| |
− | |tcase min=0 °C
| |
− | |tcase max=76 °C
| |
− | |dts min=0 °C
| |
− | |dts max=98 °C
| |
− | |package name 1=intel,fclga_3647
| |
− | |successor=Xeon Gold 6246
| |
− | |successor link=intel/xeon_gold/6246
| |
− | }} | |
− | '''Xeon Gold 6146''' is a {{arch|64}} [[dodeca-core]] [[x86]] multi-socket high performance server microprocessor introduced by [[Intel]] in mid-2017. This chip supports up to 4-way multiprocessing. The Gold 6146, which is based on the server configuration of the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture and is manufactured on a [[14 nm process|14 nm+ process]], sports 2 {{x86|AVX-512}} [[FMA]] units as well as three {{intel|Ultra Path Interconnect}} links. This microprocessor, which operates at 3.2 GHz with a TDP of 165 W and a {{intel|turbo boost}} frequency of up to 4.2 GHz, supports up 768 GiB of hexa-channel DDR4-2666 ECC memory.
| |
− | | |
− | == Cache ==
| |
− | {{main|intel/microarchitectures/skylake_(server)#Memory_Hierarchy|l1=Skylake § Cache}}
| |
− | The Xeon Gold 6146 features a considerably larger non-default 24.75 MiB of [[L3]], a size that would normally be found on an 18-core part.
| |
− | {{cache size
| |
− | |l1 cache=768 KiB
| |
− | |l1i cache=384 KiB
| |
− | |l1i break=12x32 KiB
| |
− | |l1i desc=8-way set associative
| |
− | |l1d cache=384 KiB
| |
− | |l1d break=12x32 KiB
| |
− | |l1d desc=8-way set associative
| |
− | |l1d policy=write-back
| |
− | |l2 cache=12 MiB
| |
− | |l2 break=12x1 MiB
| |
− | |l2 desc=16-way set associative
| |
− | |l2 policy=write-back
| |
− | |l3 cache=24.75 MiB
| |
− | |l3 break=18x1.375 MiB
| |
− | |l3 desc=11-way set associative
| |
− | |l3 policy=write-back
| |
− | }}
| |
− | | |
− | == Memory controller ==
| |
− | {{memory controller
| |
− | |type=DDR4-2666
| |
− | |ecc=Yes
| |
− | |max mem=768 GiB
| |
− | |controllers=2
| |
− | |channels=6
| |
− | |max bandwidth=119.21 GiB/s
| |
− | |bandwidth schan=19.87 GiB/s
| |
− | |bandwidth dchan=39.74 GiB/s
| |
− | |bandwidth qchan=79.47 GiB/s
| |
− | |bandwidth hchan=119.21 GiB/s
| |
− | }}
| |
− | | |
− | == Expansions ==
| |
− | {{expansions
| |
− | | pcie revision = 3.0
| |
− | | pcie lanes = 48
| |
− | | pcie config = x16
| |
− | | pcie config 2 = x8
| |
− | | pcie config 3 = x4
| |
− | }}
| |
− | | |
− | == Features ==
| |
− | {{x86 features
| |
− | |real=Yes
| |
− | |protected=Yes
| |
− | |smm=Yes
| |
− | |fpu=Yes
| |
− | |x8616=Yes
| |
− | |x8632=Yes
| |
− | |x8664=Yes
| |
− | |nx=Yes
| |
− | |mmx=Yes
| |
− | |emmx=Yes
| |
− | |sse=Yes
| |
− | |sse2=Yes
| |
− | |sse3=Yes
| |
− | |ssse3=Yes
| |
− | |sse41=Yes
| |
− | |sse42=Yes
| |
− | |sse4a=No
| |
− | |avx=Yes
| |
− | |avx2=Yes
| |
− | |avx512f=Yes
| |
− | |avx512cd=Yes
| |
− | |avx512er=No
| |
− | |avx512pf=No
| |
− | |avx512bw=Yes
| |
− | |avx512dq=Yes
| |
− | |avx512vl=Yes
| |
− | |avx512ifma=No
| |
− | |avx512vbmi=No
| |
− | |avx5124fmaps=No
| |
− | |avx5124vnniw=No
| |
− | |avx512vpopcntdq=No
| |
− | |abm=Yes
| |
− | |tbm=No
| |
− | |bmi1=Yes
| |
− | |bmi2=Yes
| |
− | |fma3=Yes
| |
− | |fma4=No
| |
− | |aes=Yes
| |
− | |rdrand=Yes
| |
− | |sha=No
| |
− | |xop=No
| |
− | |adx=Yes
| |
− | |clmul=Yes
| |
− | |f16c=Yes
| |
− | |tbt1=No
| |
− | |tbt2=Yes
| |
− | |tbmt3=No
| |
− | |bpt=No
| |
− | |eist=Yes
| |
− | |sst=Yes
| |
− | |flex=No
| |
− | |fastmem=No
| |
− | |ivmd=Yes
| |
− | |intelnodecontroller=Yes
| |
− | |intelnode=Yes
| |
− | |kpt=Yes
| |
− | |ptt=Yes
| |
− | |intelrunsure=Yes
| |
− | |mbe=Yes
| |
− | |isrt=No
| |
− | |sba=No
| |
− | |mwt=No
| |
− | |sipp=No
| |
− | |att=No
| |
− | |ipt=No
| |
− | |tsx=Yes
| |
− | |txt=Yes
| |
− | |ht=Yes
| |
− | |vpro=Yes
| |
− | |vtx=Yes
| |
− | |vtd=Yes
| |
− | |ept=Yes
| |
− | |mpx=No
| |
− | |sgx=No
| |
− | |securekey=No
| |
− | |osguard=No
| |
− | |3dnow=No
| |
− | |e3dnow=No
| |
− | |smartmp=No
| |
− | |powernow=No
| |
− | |amdvi=No
| |
− | |amdv=No
| |
− | |amdsme=No
| |
− | |amdtsme=No
| |
− | |amdsev=No
| |
− | |rvi=No
| |
− | |smt=No
| |
− | |sensemi=No
| |
− | |xfr=No
| |
− | }}
| |
− | | |
− | == Frequencies ==
| |
− | {{see also|intel/frequency_behavior|l1=Intel's CPU Frequency Behavior}}
| |
− | {{frequency table
| |
− | |freq_base=3,200 MHz
| |
− | |freq_1=4,200 MHz
| |
− | |freq_2=4,200 MHz
| |
− | |freq_3=4,100 MHz
| |
− | |freq_4=4,100 MHz
| |
− | |freq_5=4,000 MHz
| |
− | |freq_6=4,000 MHz
| |
− | |freq_7=4,000 MHz
| |
− | |freq_8=4,000 MHz
| |
− | |freq_9=3,900 MHz
| |
− | |freq_10=3,900 MHz
| |
− | |freq_11=3,900 MHz
| |
− | |freq_12=3,900 MHz
| |
− | |freq_avx2_base=2,600 MHz
| |
− | |freq_avx2_1=3,600 MHz
| |
− | |freq_avx2_2=3,600 MHz
| |
− | |freq_avx2_3=3,400 MHz
| |
− | |freq_avx2_4=3,400 MHz
| |
− | |freq_avx2_5=3,300 MHz
| |
− | |freq_avx2_6=3,300 MHz
| |
− | |freq_avx2_7=3,300 MHz
| |
− | |freq_avx2_8=3,300 MHz
| |
− | |freq_avx2_9=3,300 MHz
| |
− | |freq_avx2_10=3,300 MHz
| |
− | |freq_avx2_11=3,300 MHz
| |
− | |freq_avx2_12=3,300 MHz
| |
− | |freq_avx512_base=2,100 MHz
| |
− | |freq_avx512_1=3,500 MHz
| |
− | |freq_avx512_2=3,500 MHz
| |
− | |freq_avx512_3=3,300 MHz
| |
− | |freq_avx512_4=3,300 MHz
| |
− | |freq_avx512_5=3,100 MHz
| |
− | |freq_avx512_6=3,100 MHz
| |
− | |freq_avx512_7=3,100 MHz
| |
− | |freq_avx512_8=3,100 MHz
| |
− | |freq_avx512_9=2,700 MHz
| |
− | |freq_avx512_10=2,700 MHz
| |
− | |freq_avx512_11=2,700 MHz
| |
− | |freq_avx512_12=2,700 MHz
| |
− | }}
| |
− | | |
− | == Benchmarks ==
| |
− | {{benchmarks main
| |
− | |
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00122.html|test_timestamp=2017-10-13 22:51:29-0400|chip_count=2|core_count=24|thread_count=24|vendor=Cisco Systems|system=Cisco UCS C240 M5 (Intel Xeon Gold 6146, 3.20GHz)|SPECspeed2017_int_base=9.79|SPECspeed2017_int_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00123.html|test_timestamp=2017-11-14 13:48:35-0500|chip_count=4|core_count=48|thread_count=48|vendor=Cisco Systems|system=Cisco UCS C480 M5 (Intel Xeon Gold 6146, 3.20GHz)|SPECspeed2017_int_base=9.88|SPECspeed2017_int_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00198.html|test_timestamp=2017-10-13 08:37:48-0400|chip_count=2|core_count=24|thread_count=24|vendor=HPE|system=ProLiant DL380 Gen10 (3.20 GHz, Intel Xeon Gold 6146)|SPECspeed2017_fp_base=105|SPECspeed2017_fp_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00205.html|test_timestamp=2017-10-13 10:17:48-0400|chip_count=2|core_count=24|copies_count=48|vendor=HPE|system=ProLiant DL380 Gen10 (3.20 GHz, Intel Xeon Gold 6146)|SPECrate2017_int_base=163|SPECrate2017_int_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00209.html|test_timestamp=2017-10-13 05:59:56-0400|chip_count=2|core_count=24|thread_count=24|vendor=HPE|system=ProLiant DL380 Gen10 (3.20 GHz, Intel Xeon Gold 6146)|SPECspeed2017_int_base=9.7|SPECspeed2017_int_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171017-00212.html|test_timestamp=2017-10-13 14:38:34-0400|chip_count=2|core_count=24|copies_count=48|vendor=HPE|system=ProLiant DL380 Gen10 (3.20 GHz, Intel Xeon Gold 6146)|SPECrate2017_fp_base=169|SPECrate2017_fp_peak=}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00402.html|test_timestamp=2017-10-24 06:12:20-0400|chip_count=2|core_count=24|thread_count=24|vendor=Cisco Systems|system=Cisco UCS B200 M5 (Intel Xeon Gold 6146, 3.20GHz)|SPECspeed2017_fp_base=106|SPECspeed2017_fp_peak=108}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00414.html|test_timestamp=2017-10-22 23:24:41-0400|chip_count=2|core_count=24|copies_count=48|vendor=Cisco Systems|system=Cisco UCS B200 M5 (Intel Xeon Gold 6146, 3.20GHz)|SPECrate2017_fp_base=168|SPECrate2017_fp_peak=171}}
| |
− | {{benchmark entry|type=spec_cpu2017|test_link=https://www.spec.org/cpu2017/results/res2017q4/cpu2017-20171031-00419.html|test_timestamp=2017-10-23 13:24:47-0400|chip_count=2|core_count=24|copies_count=48|vendor=Cisco Systems|system=Cisco UCS B200 M5 (Intel Xeon Gold 6146, 3.20GHz)|SPECrate2017_int_base=159|SPECrate2017_int_peak=167}}
| |
− | }}
| |
− | | |
− | [[Category:microprocessor models by intel based on skylake extreme core count die]]
| |