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Difference between revisions of "intel/xeon gold"
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<tr class="comptable-header"><th> </th><th colspan="20">List of Skylake-based Xeon Gold Processors</th></tr> | <tr class="comptable-header"><th> </th><th colspan="20">List of Skylake-based Xeon Gold Processors</th></tr> | ||
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Revision as of 04:31, 12 July 2017
| Xeon Gold | |
.png)
| |
| Xeon Gold Logo | |
| Developer | Intel |
| Manufacturer | Intel |
| Type | Microprocessors |
| Introduction | May 4, 2017 (announced) H2, 2017 (launch) |
| Architecture | x86 server multiprocessors |
| ISA | x86-64 |
| µarch | Skylake |
| Word size | 64 bit 8 octets
16 nibbles |
| Process | 14 nm 0.014 μm
1.4e-5 mm |
| Technology | CMOS |
| Package | FCLGA-3647 |
| Socket | LGA-3647 |
| Succession | |
| ← | |
| Xeon E7 Xeon E5 |
|
Xeon Gold is a family of 64-bit x86 dual/quad-socket multi-core high performance server microprocessors introduced by Intel in 2017. The Xeon Gold offers highest performance and high scalability with up to 4-way multiprocessing.
Contents
Overview
 |
This section is empty; you can help add the missing info by editing this page. |
Members
Skylake
- See also: Skylake µarch
Introduced in July 2017, the Skylake-based Xeon Gold microprocessors support four-way multiprocessing with up to 22 cores and 44 threads. Additionally, all Xeon Gold processors support:
- TDP: 85 W - 200 W
- Mem: 768 GiB hexa-channel DDR4-2133 ECC memory.
- M versions support 1.5 TiB per socket
- I/O: 48 PCIe 3 lanes
- ISA: Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, AVX512F, AVX512CD, AVX512BW, AVX512DQ, AVX512VL)
- Features: Hyper-Threading, Turbo Boost, Speed Shift, vPro, VT-x, TSX, TXT, Volume Management Device (VMD), Mode-based Execute Control (MBE), Key Protection Technology (KPT), and Platform Trust Technology (PTT).
All Xeon Gold processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. All models also support 3 Ultra Path Interconnect (UPI) links.
| List of Skylake-based Xeon Gold Processors | ||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Main processor | Cache | Memory | ||||||||||||||||||
| Model | Price | Launched | Cores | Threads | Frequency | Max Turbo | TDP | L2$ | L3$ | Mem Type | Max Mem | |||||||||
| Count: 0 | ||||||||||||||||||||
See also
Facts about "Xeon Gold - Intel"
| designer | Intel + |
| first announced | May 4, 2017 + |
| first launched | February 2017 + |
| full page name | intel/xeon gold + |
| instance of | microprocessor family + |
| instruction set architecture | x86-64 + |
| main designer | Intel + |
| manufacturer | Intel + |
| microarchitecture | Skylake + |
| name | Xeon Gold + |
| package | FCLGA-3647 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| socket | LGA-3647 + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |
