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| type              = Microprocessors
 
| type              = Microprocessors
 
| first announced  = May 4, 2017
 
| first announced  = May 4, 2017
| first launched    = July 11, 2017
+
| first launched    = H2, 2017
 
| arch              = x86 server multiprocessors
 
| arch              = x86 server multiprocessors
 
| isa              = x86-64
 
| isa              = x86-64
Line 15: Line 15:
 
| proc              = 14 nm
 
| proc              = 14 nm
 
| tech              = CMOS
 
| tech              = CMOS
| clock min        = 1,900 MHz
+
| clock min        =  
| clock max        = 3,600 MHz
+
| clock max        =  
 
| package          = FCLGA-3647
 
| package          = FCLGA-3647
 
| socket            = LGA-3647
 
| socket            = LGA-3647
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}}
 
}}
 
'''Xeon Gold''' is a family of {{arch|64}} [[x86]] dual/quad-socket multi-core high performance server microprocessors introduced by [[Intel]] in 2017. The Xeon Gold offers highest performance and high scalability with up to 4-way multiprocessing.
 
'''Xeon Gold''' is a family of {{arch|64}} [[x86]] dual/quad-socket multi-core high performance server microprocessors introduced by [[Intel]] in 2017. The Xeon Gold offers highest performance and high scalability with up to 4-way multiprocessing.
 
== Overview ==
 
{{empty section}}
 
  
 
== Members ==
 
== Members ==
=== 5100/6100-Series (Skylake) ===
+
=== Skylake ===
{{see also|intel/microarchitectures/skylake (server)|l1=Skylake µarch}}
+
{{see also|intel/microarchitectures/skylake|l1=Skylake µarch}}
First-generation Xeon Gold processors were introduced in July 2017. Those chips were fabricated on a enhanced [[14 nm process|14nm+ process]] based on the {{intel|Skylake (server)|Skylake|l=arch}} microarchitecture which brought a {{intel|Skylake (Server)#Key changes from Broadwell|l=arch|relatively large}} SoC design change from the prior Xeon families. Those processors were the first to move to a {{intel|mesh interconnect}} which introduced a tile-based architecture, bringing the first implementation of {{x86|AVX-512}} along with a rearchitected cache hierarchy designed for server workloads. All of the gold 5100/6100-series microprocessors feature four-way [[SMP]] capabilities with up to [[22 cores]] and 44 threads. Additionally, all Xeon Gold processors support:
 
 
 
* '''Proc:''' [[14 nm process]]
 
* '''TDP:''' 85 W - 200 W
 
* '''Mem:''' 768 GiB hexa-channel DDR4-2400/2666 ECC memory.
 
** ''M'' versions support 1.5 TiB per socket
 
* '''I/O:''' 48 PCIe Gen 3.0 lanes
 
* '''ISA:''' Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, {{x86|AVX-512}}-{{x86|AVX512F|F}}/{{x86|AVX512CD|CD}}/{{x86|AVX512BW|BW}}/{{x86|AVX512DQ|DQ}}/{{x86|AVX512VL|VL}})
 
* '''Features:''' {{intel|Hyper-Threading}}, {{intel|Turbo Boost}}, {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Volume Management Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT).
 
 
 
All Xeon Gold processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. All models also support 3 {{intel|Ultra Path Interconnect}} (UPI) links. Note that the {{\|5122}} is the only 51xx SKU with a second FMA unit (on port 5) enabled.
 
 
 
 
<!-- NOTE:  
 
<!-- NOTE:  
 
           This table is generated automatically from the data in the actual articles.
 
           This table is generated automatically from the data in the actual articles.
Line 56: Line 41:
 
-->
 
-->
 
{{comp table start}}
 
{{comp table start}}
<table class="comptable sortable tc4 tc5">
+
<table class="comptable sortable tc13 tc14 tc15 tc16 tc17 tc18 tc19 tc20 tc21 tc22">
{{comp table header|main|11:List of Skylake-based Xeon Gold Processors}}
+
<tr class="comptable-header"><th>&nbsp;</th><th colspan="20">List of Skylake-based Xeon Gold Processors</th></tr>
{{comp table header|main|7:Main processor|2:Cache|2:Memory}}
+
<tr class="comptable-header"><th>&nbsp;</th><th colspan="8">Main processor</th></tr>
{{comp table header 1|cols=Price, Launched, Cores, Threads, %Frequency, %Max Turbo, %TDP, %L2$, %L3$, Mem Type, %Max Mem}}
+
{{comp table header 1|cols=Price, Process, Launched, C, T, Freq, TDP, Max Mem}}
{{comp table header|lsep|11:5100-Series}}
+
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Gold]] [[microarchitecture::Skylake]]
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Gold]] [[microarchitecture::Skylake (server)]][[series::5100]]
 
|?full page name
 
|?model number
 
|?release price
 
|?first launched
 
|?core count
 
|?thread count
 
|?base frequency#GHz
 
|?turbo frequency (1 core)#GHz
 
|?tdp
 
|?l2$ size
 
|?l3$ size
 
|?supported memory type
 
|?max memory#GiB
 
|format=template
 
|template=proc table 3
 
|userparam=13
 
|mainlabel=-
 
}}
 
{{comp table header|lsep|11:6100-Series}}
 
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Gold]] [[microarchitecture::Skylake (server)]][[series::6100]]
 
|?full page name
 
|?model number
 
|?release price
 
|?first launched
 
|?core count
 
|?thread count
 
|?base frequency#GHz
 
|?turbo frequency (1 core)#GHz
 
|?tdp
 
|?l2$ size
 
|?l3$ size
 
|?supported memory type
 
|?max memory#GiB
 
|format=template
 
|template=proc table 3
 
|userparam=13
 
|mainlabel=-
 
}}
 
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Gold]] [[microarchitecture::Skylake (server)]]}}
 
</table>
 
{{comp table end}}
 
 
 
=== 5200/6200-Series (Cascade Lake) ===
 
{{see also|intel/microarchitectures/cascade lake|intel/cores/cascade lake sp|intel/cores/cascade lake r|l1=Cascade Lake µarch|l2=Cascade Lake SP corename|l3=Cascade Lake R corename}}
 
Second-generation Xeon Scalable Gold was introduced in early 2019. Those processors are fabricated on an enhanced [[14 nm process]] based on the {{intel|Cascade Lake|l=arch}} microarchitecture which allows for higher clock speeds and introduced a {{intel|Cascade Lake#Key changes from Skylake|l=arch|number of}} hardware changes against the various [[speculative execution]] [[side channel analysis|vulnerabilities]]. Those processors also introduced new {{x86|AVX-512 VNNI|new instructions}} for the [[acceleration]] of machine learning (inference) as well as support for [[persistent memory]]. All 5200/6200-series Xeon Gold processors support:
 
 
 
* '''Proc:''' [[14 nm process]]
 
* '''TDP:''' 85 W - 200 W
 
* '''Mem:''' 1 TiB hexa-channel DDR4-2400/2666 ECC memory
 
** ''M'' versions support 2 TiB per socket
 
** ''L'' versions support 4.5 TiB per socket
 
* '''I/O:''' 48 PCIe Gen 3.0 lanes
 
* '''ISA:''' Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, {{x86|AVX-512}}-{{x86|AVX512F|F}}/{{x86|AVX512CD|CD}}/{{x86|AVX512BW|BW}}/{{x86|AVX512DQ|DQ}}/{{x86|AVX512VL|VL}}/{{x86|AVX512VNNI|VNNI}})
 
* '''Features:''' {{intel|Hyper-Threading}}, {{intel|Turbo Boost}}, {{intel|Speed Shift}}, {{intel|vPro}}, {{intel|VT-x}}, {{intel|TSX}}, {{intel|TXT}}, {{intel|Volume Management Device}} (VMD), {{intel|Mode-based Execute Control}} (MBE), {{intel|Key Protection Technology}} (KPT), and {{intel|Platform Trust Technology}} (PTT).
 
 
 
All Xeon Gold processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. Except for 'R' SKUs, all models also support 3 {{intel|Ultra Path Interconnect}} (UPI) links. Note that the {{\|5222}} is the only 51xx SKU with a second FMA unit (on port 5) enabled.
 
 
 
<!-- NOTE:
 
          This table is generated automatically from the data in the actual articles.
 
          If a microprocessor is missing from the list, an appropriate article for it needs to be
 
          created and tagged accordingly.
 
 
 
          Missing a chip? please dump its name here: https://en.wikichip.org/wiki/WikiChip:wanted_chips
 
-->
 
{{comp table start}}
 
<table class="comptable sortable tc4 tc5">
 
{{comp table header|main|11:List of Cascade Lake-based Xeon Gold Processors}}
 
{{comp table header|main|7:Main processor|2:Cache|2:Memory}}
 
{{comp table header 1|cols=Price, Launched, Cores, Threads, %Frequency, %Max Turbo, %TDP, %L2$, %L3$, Mem Type, %Max Mem}}
 
{{comp table header|lsep|11:5200-Series}}
 
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Gold]] [[microarchitecture::Cascade Lake]][[series::5200]]
 
|?full page name
 
|?model number
 
|?release price
 
|?first launched
 
|?core count
 
|?thread count
 
|?base frequency#GHz
 
|?turbo frequency (1 core)#GHz
 
|?tdp
 
|?l2$ size
 
|?l3$ size
 
|?supported memory type
 
|?max memory#GiB
 
|format=template
 
|template=proc table 3
 
|valuesep=,
 
|userparam=13
 
|mainlabel=-
 
}}
 
{{comp table header|lsep|11:6200-Series}}
 
{{#ask: [[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Gold]] [[microarchitecture::Cascade Lake]][[series::6200]]
 
 
  |?full page name
 
  |?full page name
 
  |?model number
 
  |?model number
 
  |?release price
 
  |?release price
 +
|?process
 
  |?first launched
 
  |?first launched
 
  |?core count
 
  |?core count
 
  |?thread count
 
  |?thread count
 
  |?base frequency#GHz
 
  |?base frequency#GHz
|?turbo frequency (1 core)#GHz
 
 
  |?tdp
 
  |?tdp
|?l2$ size
 
|?l3$ size
 
|?supported memory type
 
 
  |?max memory#GiB
 
  |?max memory#GiB
 
  |format=template
 
  |format=template
 
  |template=proc table 3
 
  |template=proc table 3
|valuesep=,
+
  |userparam=10
  |userparam=13
 
 
  |mainlabel=-
 
  |mainlabel=-
 
}}
 
}}
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Gold]] [[microarchitecture::Cascade Lake]]}}
+
{{comp table count|ask=[[Category:microprocessor models by intel]] [[instance of::microprocessor]] [[microprocessor family::Xeon Gold]] [[microarchitecture::Skylake]]}}
 
</table>
 
</table>
 
{{comp table end}}
 
{{comp table end}}

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Facts about "Xeon Gold - Intel"
designerIntel +
first announcedMay 4, 2017 +
first launchedJuly 11, 2017 +
full page nameintel/xeon gold +
instance ofmicroprocessor family +
instruction set architecturex86-64 +
main designerIntel +
manufacturerIntel +
microarchitectureSkylake +
nameXeon Gold +
packageFCLGA-3647 +
process14 nm (0.014 μm, 1.4e-5 mm) +
socketLGA-3647 +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +