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Difference between revisions of "intel/xeon e5/e5-4628l v4"
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== Expansions ==
 
== Expansions ==
{{mpu expansions
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{{expansions
 
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| pcie revision      = 3.0
 
| pcie lanes        = 40
 
| pcie lanes        = 40

Revision as of 15:55, 13 December 2017

Template:mpu The Xeon E5-4628L v4 is a 64-bit tetradeca-core x86 microprocessor introduced by Intel in 2016. This embedded MPU is designed for low-power 4S environments. Operating at 1.8 GHz with a turbo boost frequency of 2.2 GHz for a single active core, this MPU has a TDP of 75 W and is manufactured on a 14 nm process (based on Broadwell).

Cache

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 448 KiB
458,752 B
0.438 MiB
14x32 KiB 8-way set associative (per core, write-back)
L1D$ 448 KiB
458,752 B
0.438 MiB
14x32 KiB 8-way set associative (per core, write-back)
L2$ 3.5 MiB
3,584 KiB
3,670,016 B
0.00342 GiB
14x256 KiB 8-way set associative (per core, write-back)
L3$ 35 MiB
35,840 KiB
36,700,160 B
0.0342 GiB
14x2.5 MiB 20-way set associative (shared, per core, write-back)

Graphics

This microprocessor has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR4-2133
Controllers 1
Channels 4
ECC Support Yes
Max bandwidth 63.58 GiB/s
Bandwidth (single) 15.89 GiB/s
Bandwidth (dual) 31.79 GiB/s
Max memory 1,536 GiB
Physical Address Extensions 46 bit

Expansions

[Edit/Modify Expansions Info]

ide icon.svg
Expansion Options
PCIe
Revision3.0
Max Lanes40
Configsx4, x16


Features

Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon E5-4628L v4 - Intel#io +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Extended Page Tables + and Transactional Synchronization Extensions +
has intel enhanced speedstep technologytrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
l1d$ description8-way set associative +
l1d$ size448 KiB (458,752 B, 0.438 MiB) +
l1i$ description8-way set associative +
l1i$ size448 KiB (458,752 B, 0.438 MiB) +
l2$ description8-way set associative +
l2$ size3.5 MiB (3,584 KiB, 3,670,016 B, 0.00342 GiB) +
l3$ description20-way set associative +
l3$ size35 MiB (35,840 KiB, 36,700,160 B, 0.0342 GiB) +
max pcie lanes40 +