From WikiChip
Difference between revisions of "intel/xeon e5/e5-2682 v4"
< intel‎ | xeon e5

(turbo freq)
Line 51: Line 51:
 
| cpuid              = 406F1
 
| cpuid              = 406F1
  
 +
| isa family          = x86
 +
| isa                = x86-64
 
| microarch          = Broadwell
 
| microarch          = Broadwell
 
| platform            = Grantley EP 2S
 
| platform            = Grantley EP 2S

Revision as of 00:58, 11 December 2016

Template:mpu The Xeon E5-2682 v4 is a 64-bit hexadeca-core x86 microprocessor introduced by Intel in 2016. This server MPU is designed for 2S environments. Operating at 2.5 GHz with a turbo boost frequency of 3 GHz for a single active core, this MPU has a TDP of 120 W and is manufactured on a 14 nm process (based on Broadwell).

This microprocessor is OEM only.

Cache

Main article: Broadwell § Cache
Cache Info [Edit Values]
L1I$ 512 KiB
524,288 B
0.5 MiB
16x32 KiB 8-way set associative (per core, write-back)
L1D$ 512 KiB
524,288 B
0.5 MiB
16x32 KiB 8-way set associative (per core, write-back)
L2$ 4 MiB
4,096 KiB
4,194,304 B
0.00391 GiB
16x256 KiB 8-way set associative (per core, write-back)
L3$ 40 MiB
40,960 KiB
41,943,040 B
0.0391 GiB
16x2.5 MiB 20-way set associative (shared, per core, write-back)

Graphics

This microprocessor has no integrated graphics processing unit.

Memory controller

Integrated Memory Controller
Type DDR4-2400
Controllers 1
Channels 4
ECC Support Yes
Max bandwidth 71.53 GiB/s
Bandwidth (single) 17.88 GiB/s
Bandwidth (dual) 35.76 GiB/s
Max memory 1,536 GiB
Physical Address Extensions 46 bit

Expansions

Template:mpu expansions

Features

Template:mpu features

l1d$ description8-way set associative +
l1d$ size512 KiB (524,288 B, 0.5 MiB) +
l1i$ description8-way set associative +
l1i$ size512 KiB (524,288 B, 0.5 MiB) +
l2$ description8-way set associative +
l2$ size4 MiB (4,096 KiB, 4,194,304 B, 0.00391 GiB) +
l3$ description20-way set associative +
l3$ size40 MiB (40,960 KiB, 41,943,040 B, 0.0391 GiB) +