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Difference between revisions of "intel/xeon e3/e3-1575m v5"
< intel

(Cache)
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|s-spec=SR2QV
 
|s-spec=SR2QV
 
|market=Mobile
 
|market=Mobile
|first announced=September 1, 2015
+
|first announced=January 2, 2016
|first launched=October 27, 2015
+
|first launched=January 2, 2016
 +
|release price=$1207.00
 
|family=Xeon E3
 
|family=Xeon E3
|series=E3-1500 V5
+
|series=E3-1500 v5
 
|locked=Yes
 
|locked=Yes
 
|frequency=3,000 MHz
 
|frequency=3,000 MHz
Line 32: Line 33:
 
|max cpus=1
 
|max cpus=1
 
|max memory=64 GiB
 
|max memory=64 GiB
 +
|v core min=0.55 V
 +
|v core max=1.52 V
 
|tdp=45 W
 
|tdp=45 W
 
|ctdp down=35 W
 
|ctdp down=35 W
 
|temp min=0 °C
 
|temp min=0 °C
 
|temp max=100 °C
 
|temp max=100 °C
 +
|tjunc min=0 °C
 +
|tjunc max=100 °C
 +
|tstorage min=-25 °C
 +
|tstorage max=125 °C
 
|package module 1={{packages/intel/fcbga-1440}}
 
|package module 1={{packages/intel/fcbga-1440}}
 
}}
 
}}

Revision as of 00:23, 8 July 2017

Template:mpu The Xeon E3-1575M V5 is 64-bit x86 mobile quad-core microprocessor for introduced by Intel in October 2015. This entry-level Skylake-based workstations processor operates at 3 GHz with turbo boost of 3.9 GHz. This chip has a TDP of 45 Watts with a configurable TDP down of 35 W. The MPU supports up to 64 GiB of dual-channel DDR3/4 and has the Iris Pro Graphics P580 IGP.

Cache

Main article: Skylake § Cache

[Edit/Modify Cache Info]

hierarchy icon.svg
Cache Organization
Cache is a hardware component containing a relatively small and extremely fast memory designed to speed up the performance of a CPU by preparing ahead of time the data it needs to read from a relatively slower medium such as main memory.

The organization and amount of cache can have a large impact on the performance, power consumption, die size, and consequently cost of the IC.

Cache is specified by its size, number of sets, associativity, block size, sub-block size, and fetch and write-back policies.

Note: All units are in kibibytes and mebibytes.
L1$256 KiB
262,144 B
0.25 MiB
L1I$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associative 
L1D$128 KiB
131,072 B
0.125 MiB
4x32 KiB8-way set associativewrite-back

L2$1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
  4x256 KiB4-way set associativewrite-back

L3$8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
  4x2 MiB write-back

Graphics

This GPU features a large 128 MB of eDRAM.

Integrated Graphic Information
GPU Intel Iris Pro Graphics P580
Device ID 0x193D
Execution Units 72
Displays 3
Frequency 350 MHz
0.35 GHz
350,000 KHz
Max frequency 1.1 GHz
1,100 MHz
1,100,000 KHz
Max memory 64 GiB
65,536 MiB
67,108,864 KiB
68,719,476,736 B
Output DisplayPort, Embedded DisplayPort, HDMI, DVI
DirectX 12.1
OpenGL 4.4
OpenCL 2.0
HDMI 1.4
DP 1.2
eDP 1.3
Max HDMI Res 4096x2160 @24 Hz
Max DP Res 4096x2304 @60 Hz
Max eDP Res 4096x2304 @60 Hz
Intel Quick Sync Video
Intel WiDi (Wireless Display)
Intel Clear Video

Memory controller

Integrated Memory Controller
Type LPDDR3-1600, LPDDR3-1866, DDR4-1866, DDR4-2133
Controllers 1
Channels 2
ECC Support Yes
Max bandwidth 34.1 GB/s
Max memory 64 GiB

Expansions

Template:mpu expansions

Features

Template:mpu features

device id0x193D +
has featureintegrated gpu +
integrated gpuIntel Iris Pro Graphics P580 +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu max frequency1,100 MHz (1.1 GHz, 1,100,000 KHz) +
integrated gpu max memory65,536 MiB (67,108,864 KiB, 68,719,476,736 B, 64 GiB) +
l1$ size256 KiB (262,144 B, 0.25 MiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +