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Difference between revisions of "intel/xeon e3/e3-1505m v5"
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{{intel title|Xeon E3-1505M v5}}
 
{{intel title|Xeon E3-1505M v5}}
 
{{mpu
 
{{mpu
−
| name               = Xeon E3-1505M V5
+
|name=Xeon E3-1505M v5
−
| no image           = Yes
+
|no image=Yes
−
| image               =
+
|image=skylake h (front).png
−
| image size          =
+
|designer=Intel
−
| caption            =  
+
|manufacturer=Intel
−
| designer           = Intel
+
|model number=E3-1505M v5
−
| manufacturer       = Intel
+
|part number=CL8066202191415
−
| model number       = E3-1505M V5
+
|s-spec=SR2FN
−
| part number         = CL8066202191415
+
|market=Mobile
−
| part number 2      =  
+
|first announced=September, 2015
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| market             = Mobile
+
|first launched=October, 2015
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| first announced     = September, 2015
+
|family=Xeon E3
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| first launched     = October, 2015
+
|series=E3-1500 v5
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| last order          =
+
|locked=Yes
−
| last shipment      =
+
|frequency=2,800 MHz
−
 
+
|turbo frequency1=3,700 MHz
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| family             = Xeon E3
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|turbo frequency2=3,500 MHz
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| series             = E3-1500 V5
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|turbo frequency3=3,400 MHz
−
| locked             = Yes
+
|turbo frequency4=3,300 MHz
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| frequency           = 2800 MHz
+
|bus type=DMI 3.0
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| turbo frequency    = Yes
+
|bus links=4
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| turbo frequency1   = 3700 MHz
+
|bus rate=8 GT/s
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| turbo frequency2   =  
+
|clock multiplier=28
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| turbo frequency3   =  
+
|isa=x86-64
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| turbo frequency4   =  
+
|isa family=x86
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| bus type           = DMI 3.0
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|microarch=Skylake
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| bus speed          =  
+
|platform=Greenlow
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| bus rate           = 8 GT/s
+
|chipset=Silver Pass
−
| clock multiplier   =  
+
|core name=Skylake H
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| s-spec              = SR2FN
+
|core family=6
−
| s-spec 2            =
+
|core model=94
−
| s-spec es          =
+
|core stepping=R0
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| s-spec qs          =
+
|process=14 nm
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| cpuid              =  
+
|technology=CMOS
−
 
+
|die area=122 mm²
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| microarch           = Skylake
+
|word size=64 bit
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| platform           = Greenlow
+
|core count=4
−
| chipset             = Silver Pass
+
|thread count=8
−
| core name           = Skylake H
+
|max cpus=1
−
| core family         =  
+
|max memory=64 GiB
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| core model         =  
+
|tdp=45 W
−
| core stepping       = R0
+
|ctdp down=35 W
−
| process             = 14 nm
+
|temp min=0 °C
−
| transistors        =
+
|temp max=100 °C
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| technology         = CMOS
+
|tjunc min=0 °C
−
| die size            =  
+
|tjunc max=100 °C
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| word size           = 64 bit
+
|tstorage min=-25 °C
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| core count         = 4
+
|tstorage max=125 °C
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| thread count       = 8
+
|package module 1={{packages/intel/fcbga-1440}}
−
| max cpus           = 1
+
|turbo frequency=Yes
−
| max memory         = 64 GiB
+
|packaging=Yes
−
 
+
|package=FCBGA1440
−
 
+
|package type=FCBGA
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| v core              =
+
|package size=42mm x 28mm
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| v core tolerance    =
+
|socket=BGA1440
−
| sdp                =
+
|socket type=BGA
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| tdp                 = 45 W
 
−
| ctdp down           = 35 W
 
−
| ctdp down frequency =
 
−
| ctdp up            =
 
−
| ctdp up frequency  =
 
−
| temp max           = 100 °C
 
−
| temp min           = 0 °C
 
−
 
 
−
| packaging           = Yes
 
−
| package             = FCBGA1440
 
−
| package type       = FCBGA
 
−
| package size       = 42mm x 28mm
 
−
| socket             = BGA1440
 
−
| socket type         = BGA
 
 
}}
 
}}
 
The '''Xeon E3-1505M V5''' is {{arch|64}} [[x86]] mobile quad-core microprocessor for introduced by [[Intel]] in October 2015. This entry-level {{intel|Skylake}}-based workstations processor operates at 2.8 GHz with turbo boost of 3.7 GHz. This chip has a TDP of 45 Watts with a configurable TDP down of 35 W. The MPU supports up to 64 GiB of dual-channel DDR3/4 and has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]].
 
The '''Xeon E3-1505M V5''' is {{arch|64}} [[x86]] mobile quad-core microprocessor for introduced by [[Intel]] in October 2015. This entry-level {{intel|Skylake}}-based workstations processor operates at 2.8 GHz with turbo boost of 3.7 GHz. This chip has a TDP of 45 Watts with a configurable TDP down of 35 W. The MPU supports up to 64 GiB of dual-channel DDR3/4 and has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]].

Revision as of 18:58, 4 July 2017

Template:mpu The Xeon E3-1505M V5 is 64-bit x86 mobile quad-core microprocessor for introduced by Intel in October 2015. This entry-level Skylake-based workstations processor operates at 2.8 GHz with turbo boost of 3.7 GHz. This chip has a TDP of 45 Watts with a configurable TDP down of 35 W. The MPU supports up to 64 GiB of dual-channel DDR3/4 and has the HD Graphics P530 IGP.

Cache

Main article: Skylake § Cache
Cache Info [Edit Values]
L1I$ 128 KiB
131,072 B
0.125 MiB
4x32 KiB 8-way set associative (per core, write-back)
L1D$ 128 KiB
131,072 B
0.125 MiB
4x32 KiB 8-way set associative (per core, write-back)
L2$ 1 MiB
1,024 KiB
1,048,576 B
9.765625e-4 GiB
4x256 KiB 4-way set associative (per core)
L3$ 8 MiB
8,192 KiB
8,388,608 B
0.00781 GiB
4x2 MiB

Graphics

Integrated Graphic Information
GPU Intel HD Graphics P530
Device ID 0x191D
Execution Units 24
Displays 3
Frequency 350 MHz
0.35 GHz
350,000 KHz
Max frequency 1.05 GHz
1,050 MHz
1,050,000 KHz
Max memory 1.7 GiB
1,740.8 MiB
1,782,579.2 KiB
1,825,361,100.8 B
Output DisplayPort, Embedded DisplayPort, HDMI, DVI
DirectX 12.1
OpenGL 4.4
OpenCL 2.0
HDMI 1.4
DP 1.2
eDP 1.3
Max HDMI Res 4096x2160 @24 Hz
Max DP Res 4096x2304 @60 Hz
Max eDP Res 4096x2304 @60 Hz
Intel Quick Sync Video
Intel InTru 3D
Intel Insider
Intel WiDi (Wireless Display)
Intel Clear Video

Memory controller

Integrated Memory Controller
Type LPDDR3-1600, LPDDR3-1866, DDR4-1866, DDR4-2133
Controllers 1
Channels 2
ECC Support Yes
Max bandwidth 34.1 GB/s
Max memory 64 GiB

Expansions

Template:mpu expansions

Features

Template:mpu features

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Facts about "Xeon E3-1505M v5 - Intel"
RDF feed
device id0x191D +
has featureintegrated gpu +
integrated gpuIntel HD Graphics P530 +
integrated gpu base frequency350 MHz (0.35 GHz, 350,000 KHz) +
integrated gpu max frequency1,050 MHz (1.05 GHz, 1,050,000 KHz) +
integrated gpu max memory1,740.8 MiB (1,782,579.2 KiB, 1,825,361,100.8 B, 1.7 GiB) +
l1d$ description8-way set associative +
l1d$ size128 KiB (131,072 B, 0.125 MiB) +
l1i$ description8-way set associative +
l1i$ size128 KiB (131,072 B, 0.125 MiB) +
l2$ description4-way set associative +
l2$ size1 MiB (1,024 KiB, 1,048,576 B, 9.765625e-4 GiB) +
l3$ size8 MiB (8,192 KiB, 8,388,608 B, 0.00781 GiB) +