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Difference between revisions of "intel/xeon e3/e3-1505l v5"
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The '''Xeon E3-1505L V5''' is {{arch|64}} [[x86]] quad-core microprocessor for introduced by [[Intel]] in October 2015. This entry-level {{intel|Skylake}}-based embedded processor operates at 2 GHz with turbo boost of 2.8 GHz. This chip has a TDP of 25 Watts. The MPU supports up to 64 GB of dual-channel DDR3/4 and has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]].
 
The '''Xeon E3-1505L V5''' is {{arch|64}} [[x86]] quad-core microprocessor for introduced by [[Intel]] in October 2015. This entry-level {{intel|Skylake}}-based embedded processor operates at 2 GHz with turbo boost of 2.8 GHz. This chip has a TDP of 25 Watts. The MPU supports up to 64 GB of dual-channel DDR3/4 and has the {{intel|HD Graphics P530}} [[integrated graphics processor|IGP]].
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== Cache ==
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{{main|intel/microarchitectures/skylake#Memory_Hierarchy|l1=Skylake § Cache}}
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{{cache info
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|l1i cache=128 KB
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|l1i break=4x32 KB
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|l1i desc=8-way set associative
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|l1i extra=(per core, write-back)
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|l1d cache=128 KB
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|l1d break=4x32 KB
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|l1d desc=8-way set associative
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|l1d extra=(per core, write-back)
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|l2 cache=1 MB
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|l2 break=4x256 KB
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|l2 desc=4-way set associative
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|l2 extra=(per core)
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|l3 cache=8 MB
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|l3 break=4x2 MB
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|l3 desc=
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|l3 extra=
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}}

Revision as of 15:22, 4 May 2016

Template:mpu The Xeon E3-1505L V5 is 64-bit x86 quad-core microprocessor for introduced by Intel in October 2015. This entry-level Skylake-based embedded processor operates at 2 GHz with turbo boost of 2.8 GHz. This chip has a TDP of 25 Watts. The MPU supports up to 64 GB of dual-channel DDR3/4 and has the HD Graphics P530 IGP.

Cache

Main article: Skylake § Cache
Cache Info [Edit Values]
L1I$ 128 KB
"KB" is not declared as a valid unit of measurement for this property.
 		4x32 KB 8-way set associative (per core, write-back)
L1D$ 128 KB
"KB" is not declared as a valid unit of measurement for this property.
 		4x32 KB 8-way set associative (per core, write-back)
L2$ 1 MB
"MB" is not declared as a valid unit of measurement for this property.
 		4x256 KB 4-way set associative (per core)
L3$ 8 MB
"MB" is not declared as a valid unit of measurement for this property.
 		4x2 MB
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l1d$ description8-way set associative +
l1i$ description8-way set associative +
l2$ description4-way set associative +