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Display titleXeon D-1653N - Intel
Default sort keyXeon D-1653N, Intel
Page length (in bytes)3,732
Page ID33048
Page content languageEnglish (en)
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Page creatorDavid (talk | contribs)
Date of page creation11:51, 2 April 2019
Latest editorDavid (talk | contribs)
Date of latest edit07:47, 6 April 2019
Total number of edits3
Total number of distinct authors1
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Facts about "Xeon D-1653N - Intel"
Has subobject
"Has subobject" is a predefined property representing a container construct and is provided by Semantic MediaWiki.
Xeon D-1653N - Intel#pcie +
back imageFile:broadwell de (back).png +
base frequency2,800 MHz (2.8 GHz, 2,800,000 kHz) +
bus typeDMI 2.0 +
clock multiplier28 +
core count8 +
core family6 +
core model6 +
core nameHewitt Lake +
designerIntel +
die area246.24 mm² (0.382 in², 2.462 cm², 246,240,000 µm²) +
familyXeon D +
first announcedApril 2, 2019 +
first launchedApril 2, 2019 +
full page nameintel/xeon d/d-1653n +
has advanced vector extensionstrue +
has advanced vector extensions 2true +
has ecc memory supporttrue +
has extended page tables supporttrue +
has featureAdvanced Vector Extensions +, Advanced Vector Extensions 2 +, Advanced Encryption Standard Instruction Set Extension +, Hyper-Threading Technology +, Turbo Boost Technology 2.0 +, Enhanced SpeedStep Technology +, Trusted Execution Technology +, Intel VT-x +, Intel VT-d +, Extended Page Tables +, Transactional Synchronization Extensions +, Secure Key Technology +, OS Guard + and Integrated QuickAssist Technology +
has integrated intel quickassist technologytrue +
has intel enhanced speedstep technologytrue +
has intel secure key technologytrue +
has intel supervisor mode execution protectiontrue +
has intel trusted execution technologytrue +
has intel turbo boost technology 2 0true +
has intel vt-d technologytrue +
has intel vt-x technologytrue +
has locked clock multipliertrue +
has second level address translation supporttrue +
has simultaneous multithreadingtrue +
has transactional synchronization extensionstrue +
has x86 advanced encryption standard instruction set extensiontrue +
instance ofmicroprocessor +
isax86-64 +
isa familyx86 +
l1$ size0.5 MiB (512 KiB, 524,288 B, 4.882812e-4 GiB) +
l1d$ description8-way set associative +
l1d$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l1i$ description8-way set associative +
l1i$ size0.25 MiB (256 KiB, 262,144 B, 2.441406e-4 GiB) +
l2$ description8-way set associative +
l2$ size2 MiB (2,048 KiB, 2,097,152 B, 0.00195 GiB) +
l3$ description16-way set associative +
l3$ size12 MiB (12,288 KiB, 12,582,912 B, 0.0117 GiB) +
ldateApril 2, 2019 +
main imageFile:hewitt lake (front).png +
manufacturerIntel +
market segmentServer + and Embedded +
max cpu count1 +
max memory131,072 MiB (134,217,728 KiB, 137,438,953,472 B, 128 GiB, 0.125 TiB) +
max memory channels2 +
max sata ports6 +
max usb ports4 +
microarchitectureBroadwell +
model numberD-1653N +
nameXeon D-1653N +
packageFCBGA-1667 +
platformGrangeville +
process14 nm (0.014 μm, 1.4e-5 mm) +
release price$ 748.00 (€ 673.20, £ 605.88, ¥ 77,290.84) +
release price (tray)$ 748.00 (€ 673.20, £ 605.88, ¥ 77,290.84) +
seriesD-1600 +
supported memory typeDDR4-2400 +
tdp65 W (65,000 mW, 0.0872 hp, 0.065 kW) +
technologyCMOS +
thread count16 +
transistor count3,200,000,000 +
turbo frequency (1 core)3,100 MHz (3.1 GHz, 3,100,000 kHz) +
word size64 bit (8 octets, 16 nibbles) +