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== History ==
 
== History ==
 
The Xeon D began as a joint collaboration between [[Facebook]] and [[Intel]] in 2013. Yosemite is the codename for Facebook's open source modular chassis for the highly-concurrent but lower-power microservers. The design calls for dense nodes of lower power but highly concurrent workload which tends to be mostly memory-bandwidth-bound. While early designs where mostly based on the {{intel|Atom}} SoCs, their performance proved to be too much of a bottleneck on its own. Xeon D is a middle-tier family that's a step above {{intel|Atom}} in terms of performance, but below {{intel|Xeon E3}} power-wise. Xeon D is largely driven by high concurrency and better memory capabilities.
 
The Xeon D began as a joint collaboration between [[Facebook]] and [[Intel]] in 2013. Yosemite is the codename for Facebook's open source modular chassis for the highly-concurrent but lower-power microservers. The design calls for dense nodes of lower power but highly concurrent workload which tends to be mostly memory-bandwidth-bound. While early designs where mostly based on the {{intel|Atom}} SoCs, their performance proved to be too much of a bottleneck on its own. Xeon D is a middle-tier family that's a step above {{intel|Atom}} in terms of performance, but below {{intel|Xeon E3}} power-wise. Xeon D is largely driven by high concurrency and better memory capabilities.
 
Currently, Intel offers two series of Xeon D parts - dense low-power and dense high-power parts.
 
  
 
{| class="wikitable"
 
{| class="wikitable"
 
|-
 
|-
 
! Series !! Introduction !! Codename !! Microarchitecture
 
! Series !! Introduction !! Codename !! Microarchitecture
|-
 
! colspan="4" | Dense, Low-power
 
 
|-
 
|-
 
| D-1500 || March, [[2015]] || {{intel|Broadwell DE|l=core}} || {{intel|Broadwell|l=arch}}
 
| D-1500 || March, [[2015]] || {{intel|Broadwell DE|l=core}} || {{intel|Broadwell|l=arch}}
 
|-
 
|-
| D-1600 || April, [[2019]] || {{intel|Hewitt Lake|l=core}} || {{intel|Broadwell|l=arch}}
+
| D-2100 || February, [[2018]] || {{intel|Skylake DE|l=core}} || {{intel|Skylake (server)|Skylake|l=arch}}
|-
 
! colspan="4" | Dense, High-power
 
 
|-
 
|-
| D-2100 || February, [[2018]] || {{intel|Skylake DE|l=core}} || {{intel|Skylake (server)|Skylake|l=arch}}
+
| D-??00 || February, [[2019]] || {{intel|Hewitt Lake|l=core}} || {{intel|Cascade Lake|l=arch}}
 
|}
 
|}
  

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Facts about "Xeon D - Intel"
designerIntel +
first announcedMarch 9, 2015 +
first launchedMarch 9, 2015 +
full page nameintel/xeon d +
instance ofintegrated circuit family +
instruction set architecturex86-64 +
main designerIntel +
manufacturerIntel +
microarchitectureBroadwell + and Skylake (server) +
nameIntel Xeon D +
packagefcBGA-1667 +
process14 nm (0.014 μm, 1.4e-5 mm) +
socketBGA-1667 +
technologyCMOS +
word size64 bit (8 octets, 16 nibbles) +