Semiconductor & Computer Engineering
| Xeon Bronze | |
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| |
| Xeon Bronze Logo | |
| Developer | Intel |
| Manufacturer | Intel |
| Type | Microprocessors |
| Introduction | May 4, 2017 (announced) July 11, 2017 (launch) |
| Architecture | x86 server multiprocessors |
| ISA | x86-64 |
| µarch | Skylake |
| Word size | 64 bit 8 octets
16 nibbles |
| Process | 14 nm 0.014 μm
1.4e-5 mm |
| Technology | CMOS |
| Package | FCLGA-3647 |
| Socket | LGA-3647 |
| Succession | |
| ← | |
| Xeon E7 Xeon E5 |
|
Xeon Bronze is a family of 64-bit x86 dual-socket multi-core entry-level server microprocessors introduced by Intel in 2017.
Contents
Overview
Released in July 2017, the Xeon Bronze are the successor to the Xeon E5/E7 families. Xeon Bronze is geared toward entry-level dual-socket server and workstation microprocessors. Those processors are ideally positioned for price-sensitive applications which require light-range workloads with enhanced security features and large memory. Additionally, those processors incorporate a number of Ultra Path Interconnect (UPI) links. Unlike the higher tier Xeon families, the Xeon Bronze doesn't have Turbo Boost Technology or Hyper-Threading support.
Members
Skylake
- See also: Skylake µarch
Introduced in July 2017, the Skylake-based Xeon Bronze microprocessors are all dual-socket multiprocessors with up to 8 cores and 16 threads. Additionally, all Xeon Bronze processors support:
- TDP: 85 W
- Mem: 768 GiB hexa-channel DDR4-2133 ECC memory.
- I/O: 48 PCIe 3 lanes
- ISA: Everything up to AVX-512 (SMM, FPU, NX, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, AES, AVX, FMA3, AVX2, AVX512F, AVX512CD, AVX512BW, AVX512DQ, AVX512VL)
- Features: Speed Shift, vPro, VT-x, TSX, TXT, Volume Management Device (VMD), Mode-based Execute Control (MBE), Key Protection Technology (KPT), and Platform Trust Technology (PTT).
All Xeon Bronze processors support QuickAssist Technology which is integrated on the chipset as well as the Omni-Path Architecture on the chipset as well as via discrete PCIe cards. All models also support 2 Ultra Path Interconnect (UPI) links.
| List of Skylake-based Xeon Bronze Processors | ||||||||||||||||||||
|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|---|
| Main processor | Cache | Memory | ||||||||||||||||||
| Model | Price | Launched | Cores | Threads | Frequency | TDP | L2$ | L3$ | Mem Type | Max Mem | ||||||||||
| Count: 0 | ||||||||||||||||||||
See also
| designer | Intel + |
| first announced | May 4, 2017 + |
| first launched | July 11, 2017 + |
| full page name | intel/xeon bronze + |
| instance of | microprocessor family + |
| instruction set architecture | x86-64 + |
| main designer | Intel + |
| manufacturer | Intel + |
| microarchitecture | Skylake + |
| name | Xeon Bronze + |
| package | FCLGA-3647 + |
| process | 14 nm (0.014 μm, 1.4e-5 mm) + |
| socket | LGA-3647 + |
| technology | CMOS + |
| word size | 64 bit (8 octets, 16 nibbles) + |
