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Difference between revisions of "intel/xeon"
< intel

(Xeon Timeline: combined intro)
(Xeon Timeline: combined families)
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| style="background-color: #e6f7ff;" | 1998 || style="background-color: #fff5cc;" | {{intel|Pentium II Xeon}} || style="background-color: #ffe6ff;" | [[250 nm]] || style="background-color: #b3ffb3;" | {{intel|P6}} || style="background-color: #ebebe0;" | [[Drake]] || style="background-color: #eeffcc;" | 1
 
| style="background-color: #e6f7ff;" | 1998 || style="background-color: #fff5cc;" | {{intel|Pentium II Xeon}} || style="background-color: #ffe6ff;" | [[250 nm]] || style="background-color: #b3ffb3;" | {{intel|P6}} || style="background-color: #ebebe0;" | [[Drake]] || style="background-color: #eeffcc;" | 1
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" rowspan="2" | 1999 || style="background-color: #fff5cc;" | {{intel|Pentium III Xeon}} || style="background-color: #ffe6ff;" | [[250 nm]] || style="background-color: #b3ffb3;" | {{intel|P6}} || style="background-color: #ebebe0;" | [[Tanner]] || style="background-color: #eeffcc;" | 1
+
| style="background-color: #e6f7ff;" rowspan="2" | 1999 || style="background-color: #fff5cc;" rowspan="2" | {{intel|Pentium III Xeon}} || style="background-color: #ffe6ff;" | [[250 nm]] || style="background-color: #b3ffb3;" | {{intel|P6}} || style="background-color: #ebebe0;" | [[Tanner]] || style="background-color: #eeffcc;" | 1
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Pentium III Xeon}} || style="background-color: #ffe6ff;" | [[180 nm]] || style="background-color: #b3ffb3;" | {{intel|P6}} || style="background-color: #ebebe0;" | [[Cascades]] || style="background-color: #eeffcc;" | 1
+
| style="background-color: #ffe6ff;" | [[180 nm]] || style="background-color: #b3ffb3;" | {{intel|P6}} || style="background-color: #ebebe0;" | [[Cascades]] || style="background-color: #eeffcc;" | 1
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" | 2001 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[180 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Foster]] || style="background-color: #eeffcc;" | 1
+
| style="background-color: #e6f7ff;" | 2001 || style="background-color: #fff5cc;" rowspan="29" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[180 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Foster]] || style="background-color: #eeffcc;" | 1
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" | 2002 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[130 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Prestonia]] || style="background-color: #eeffcc;" | 1
+
| style="background-color: #e6f7ff;" | 2002 || style="background-color: #ffe6ff;" | [[130 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Prestonia]] || style="background-color: #eeffcc;" | 1
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" | 2003 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[130 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Gallatin]] || style="background-color: #eeffcc;" | 1
+
| style="background-color: #e6f7ff;" | 2003 || style="background-color: #ffe6ff;" | [[130 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Gallatin]] || style="background-color: #eeffcc;" | 1
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" | 2004 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[90 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Nocona]] || style="background-color: #eeffcc;" | 1
+
| style="background-color: #e6f7ff;" | 2004 || style="background-color: #ffe6ff;" | [[90 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Nocona]] || style="background-color: #eeffcc;" | 1
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" rowspan="4" | 2005 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[90 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Irwindale]] || style="background-color: #eeffcc;" | 1
+
| style="background-color: #e6f7ff;" rowspan="4" | 2005 || style="background-color: #ffe6ff;" | [[90 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Irwindale]] || style="background-color: #eeffcc;" | 1
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[90 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Paxville]] || style="background-color: #eeffcc;" | 2
+
| style="background-color: #ffe6ff;" | [[90 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Paxville]] || style="background-color: #eeffcc;" | 2
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[90 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Potomac]] || style="background-color: #eeffcc;" | 1
+
| style="background-color: #ffe6ff;" | [[90 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Potomac]] || style="background-color: #eeffcc;" | 1
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[90 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Cranford]] || style="background-color: #eeffcc;" | 1
+
| style="background-color: #ffe6ff;" | [[90 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Cranford]] || style="background-color: #eeffcc;" | 1
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" rowspan="6" | 2006 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Dempsey]] || style="background-color: #eeffcc;" | 2
+
| style="background-color: #e6f7ff;" rowspan="6" | 2006 || style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Dempsey]] || style="background-color: #eeffcc;" | 2
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Tulsa]] || style="background-color: #eeffcc;" | 2
+
| style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|NetBurst}} || style="background-color: #ebebe0;" | [[Tulsa]] || style="background-color: #eeffcc;" | 2
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/Modified Pentium M|MPM}} || style="background-color: #ebebe0;" | [[Sossaman]] || style="background-color: #eeffcc;" | 2
+
| style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/Modified Pentium M|MPM}} || style="background-color: #ebebe0;" | [[Sossaman]] || style="background-color: #eeffcc;" | 2
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/core|Core}} || style="background-color: #ebebe0;" | [[Woodcrest]] || style="background-color: #eeffcc;" | 2
+
| style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/core|Core}} || style="background-color: #ebebe0;" | [[Woodcrest]] || style="background-color: #eeffcc;" | 2
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/core|Core}} || style="background-color: #ebebe0;" | [[Conroe]] || style="background-color: #eeffcc;" | 2
+
| style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/core|Core}} || style="background-color: #ebebe0;" | [[Conroe]] || style="background-color: #eeffcc;" | 2
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/core|Core}} || style="background-color: #ebebe0;" | [[Clovertown]] || style="background-color: #eeffcc;" | 4
+
| style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/core|Core}} || style="background-color: #ebebe0;" | [[Clovertown]] || style="background-color: #eeffcc;" | 4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" rowspan="5" | 2007 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/core|Core}} || style="background-color: #ebebe0;" | [[Allendale]] || style="background-color: #eeffcc;" | 2
+
| style="background-color: #e6f7ff;" rowspan="5" | 2007 || style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/core|Core}} || style="background-color: #ebebe0;" | [[Allendale]] || style="background-color: #eeffcc;" | 2
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/core|Core}} || style="background-color: #ebebe0;" | [[Kentsfield]] || style="background-color: #eeffcc;" | 4
+
| style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/core|Core}} || style="background-color: #ebebe0;" | [[Kentsfield]] || style="background-color: #eeffcc;" | 4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/core|Core}} || style="background-color: #ebebe0;" | [[Tigerton]] || style="background-color: #eeffcc;" | 2
+
| style="background-color: #ffe6ff;" | [[65 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/core|Core}} || style="background-color: #ebebe0;" | [[Tigerton]] || style="background-color: #eeffcc;" | 2
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/penryn|Penryn}} || style="background-color: #ebebe0;" | [[Wolfdale]] || style="background-color: #eeffcc;" | 2
+
| style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/penryn|Penryn}} || style="background-color: #ebebe0;" | [[Wolfdale]] || style="background-color: #eeffcc;" | 2
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/penryn|Penryn}} || style="background-color: #ebebe0;" | [[Harpertown]] || style="background-color: #eeffcc;" | 4
+
| style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/penryn|Penryn}} || style="background-color: #ebebe0;" | [[Harpertown]] || style="background-color: #eeffcc;" | 4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" rowspan="2" | 2008 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/penryn|Penryn}} || style="background-color: #ebebe0;" | [[Yorkfield]] || style="background-color: #eeffcc;" | 4
+
| style="background-color: #e6f7ff;" rowspan="2" | 2008 || style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/penryn|Penryn}} || style="background-color: #ebebe0;" | [[Yorkfield]] || style="background-color: #eeffcc;" | 4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/penryn|Penryn}} || style="background-color: #ebebe0;" | [[Dunnington]] || style="background-color: #eeffcc;" | 4,6
+
| style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/penryn|Penryn}} || style="background-color: #ebebe0;" | [[Dunnington]] || style="background-color: #eeffcc;" | 4,6
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" rowspan="3" | 2009 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/nehalem|Nehalem}} || style="background-color: #ebebe0;" | [[Lynnfield]] || style="background-color: #eeffcc;" | 4
+
| style="background-color: #e6f7ff;" rowspan="3" | 2009 || style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/nehalem|Nehalem}} || style="background-color: #ebebe0;" | [[Lynnfield]] || style="background-color: #eeffcc;" | 4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/nehalem|Nehalem}} || style="background-color: #ebebe0;" | [[Bloomfield]] || style="background-color: #eeffcc;" | 2,4
+
| style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/nehalem|Nehalem}} || style="background-color: #ebebe0;" | [[Bloomfield]] || style="background-color: #eeffcc;" | 2,4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/nehalem|Nehalem}} || style="background-color: #ebebe0;" | [[Gainestown]] || style="background-color: #eeffcc;" | 2,4
+
| style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/nehalem|Nehalem}} || style="background-color: #ebebe0;" | [[Gainestown]] || style="background-color: #eeffcc;" | 2,4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" rowspan="6"| 2010 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/nehalem|Nehalem}} || style="background-color: #ebebe0;" | [[Jasper Forest]] || style="background-color: #eeffcc;" | 1,2,4
+
| style="background-color: #e6f7ff;" rowspan="6"| 2010 || style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/nehalem|Nehalem}} || style="background-color: #ebebe0;" | [[Jasper Forest]] || style="background-color: #eeffcc;" | 1,2,4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/nehalem|Nehalem}} || style="background-color: #ebebe0;" | [[Beckton]] || style="background-color: #eeffcc;" | 4,6,8
+
| style="background-color: #ffe6ff;" | [[45 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/nehalem|Nehalem}} || style="background-color: #ebebe0;" | [[Beckton]] || style="background-color: #eeffcc;" | 4,6,8
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/westmere|Westmere}} || style="background-color: #ebebe0;" | [[Clarkdale]] || style="background-color: #eeffcc;" | 2
+
| style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/westmere|Westmere}} || style="background-color: #ebebe0;" | [[Clarkdale]] || style="background-color: #eeffcc;" | 2
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/westmere|Westmere}} || style="background-color: #ebebe0;" | [[Gulftown]] || style="background-color: #eeffcc;" | 6
+
| style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/westmere|Westmere}} || style="background-color: #ebebe0;" | [[Gulftown]] || style="background-color: #eeffcc;" | 6
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/westmere|Westmere}} || style="background-color: #ebebe0;" | [[Westmere EP]] || style="background-color: #eeffcc;" | 2,4,6
+
| style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/westmere|Westmere}} || style="background-color: #ebebe0;" | [[Westmere EP]] || style="background-color: #eeffcc;" | 2,4,6
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/westmere|Westmere}} || style="background-color: #ebebe0;" | [[Westmere EX]] || style="background-color: #eeffcc;" | 6,8,10
+
| style="background-color: #fff5cc;" rowspan="20" | {{intel|Xeon E3}}<br>{{intel|Xeon E5}}<br>{{intel|Xeon E7}} || style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/westmere|Westmere}} || style="background-color: #ebebe0;" | [[Westmere EX]] || style="background-color: #eeffcc;" | 6,8,10
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" | 2011 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/sandy bridge|Sandy Bridge}} || style="background-color: #ebebe0;" | [[Sandy Bridge]] || style="background-color: #eeffcc;" | 2,4
+
| style="background-color: #e6f7ff;" | 2011 || style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/sandy bridge|Sandy Bridge}} || style="background-color: #ebebe0;" | [[Sandy Bridge]] || style="background-color: #eeffcc;" | 2,4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" rowspan="4" | 2012 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/sandy bridge|Sandy Bridge}} || style="background-color: #ebebe0;" | [[Gladden]] || style="background-color: #eeffcc;" | 4
+
| style="background-color: #e6f7ff;" rowspan="4" | 2012 || style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/sandy bridge|Sandy Bridge}} || style="background-color: #ebebe0;" | [[Gladden]] || style="background-color: #eeffcc;" | 4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/sandy bridge|Sandy Bridge}} || style="background-color: #ebebe0;" | [[Sandy Bridge EN]] || style="background-color: #eeffcc;" | 4,6,8
+
| style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/sandy bridge|Sandy Bridge}} || style="background-color: #ebebe0;" | [[Sandy Bridge EN]] || style="background-color: #eeffcc;" | 4,6,8
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/sandy bridge|Sandy Bridge}} || style="background-color: #ebebe0;" | [[Sandy Bridge EP]] || style="background-color: #eeffcc;" | 4,6,8
+
| style="background-color: #ffe6ff;" | [[32 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/sandy bridge|Sandy Bridge}} || style="background-color: #ebebe0;" | [[Sandy Bridge EP]] || style="background-color: #eeffcc;" | 4,6,8
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/ivy bridge|Ivy Bridge}} || style="background-color: #ebebe0;" | [[Ivy Bridge]] || style="background-color: #eeffcc;" | 2,4
+
| style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/ivy bridge|Ivy Bridge}} || style="background-color: #ebebe0;" | [[Ivy Bridge]] || style="background-color: #eeffcc;" | 2,4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" rowspan="3" | 2013 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/ivy bridge|Ivy Bridge}} || style="background-color: #ebebe0;" | [[Gladden]] || style="background-color: #eeffcc;" | 4
+
| style="background-color: #e6f7ff;" rowspan="3" | 2013 || style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/ivy bridge|Ivy Bridge}} || style="background-color: #ebebe0;" | [[Gladden]] || style="background-color: #eeffcc;" | 4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/ivy bridge|Ivy Bridge}} || style="background-color: #ebebe0;" | [[Ivy Bridge EP]] || style="background-color: #eeffcc;" | 4,6,8,10,12
+
| style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/ivy bridge|Ivy Bridge}} || style="background-color: #ebebe0;" | [[Ivy Bridge EP]] || style="background-color: #eeffcc;" | 4,6,8,10,12
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/haswell|Haswell}} || style="background-color: #ebebe0;" | [[Haswell WS]] || style="background-color: #eeffcc;" | 2,4
+
| style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/haswell|Haswell}} || style="background-color: #ebebe0;" | [[Haswell WS]] || style="background-color: #eeffcc;" | 2,4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" rowspan="3" | 2014 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/ivy bridge|Ivy Bridge}} || style="background-color: #ebebe0;" | [[Ivy Bridge EN]] || style="background-color: #eeffcc;" | 4,6,8,10
+
| style="background-color: #e6f7ff;" rowspan="3" | 2014 || style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/ivy bridge|Ivy Bridge}} || style="background-color: #ebebe0;" | [[Ivy Bridge EN]] || style="background-color: #eeffcc;" | 4,6,8,10
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/ivy bridge|Ivy Bridge}} || style="background-color: #ebebe0;" | [[Ivy Bridge EX]] || style="background-color: #eeffcc;" | 12,15
+
| style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/ivy bridge|Ivy Bridge}} || style="background-color: #ebebe0;" | [[Ivy Bridge EX]] || style="background-color: #eeffcc;" | 12,15
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/haswell|Haswell}} || style="background-color: #ebebe0;" | [[Haswell EP]] || style="background-color: #eeffcc;" | 4,6,8,10,12,14
+
| style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/haswell|Haswell}} || style="background-color: #ebebe0;" | [[Haswell EP]] || style="background-color: #eeffcc;" | 4,6,8,10,12,14
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" rowspan="5" | 2015 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/haswell|Haswell}} || style="background-color: #ebebe0;" | [[Haswell EN]] || style="background-color: #eeffcc;" | 4,6,8,10
+
| style="background-color: #e6f7ff;" rowspan="5" | 2015 || style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/haswell|Haswell}} || style="background-color: #ebebe0;" | [[Haswell EN]] || style="background-color: #eeffcc;" | 4,6,8,10
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/haswell|Haswell}} || style="background-color: #ebebe0;" | [[Haswell EX]] || style="background-color: #eeffcc;" | 8,10,12,14,16,18
+
| style="background-color: #ffe6ff;" | [[22 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/haswell|Haswell}} || style="background-color: #ebebe0;" | [[Haswell EX]] || style="background-color: #eeffcc;" | 8,10,12,14,16,18
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[14 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/broadwell|Broadwell}} || style="background-color: #ebebe0;" | [[Broadwell DE]] || style="background-color: #eeffcc;" | 4,6,8,12,16
+
| style="background-color: #ffe6ff;" | [[14 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/broadwell|Broadwell}} || style="background-color: #ebebe0;" | [[Broadwell DE]] || style="background-color: #eeffcc;" | 4,6,8,12,16
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[14 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/broadwell|Broadwell}} || style="background-color: #ebebe0;" | [[Broadwell H]] || style="background-color: #eeffcc;" | 4
+
| style="background-color: #ffe6ff;" | [[14 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/broadwell|Broadwell}} || style="background-color: #ebebe0;" | [[Broadwell H]] || style="background-color: #eeffcc;" | 4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[14 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/skylake|Skylake}} || style="background-color: #ebebe0;" | [[Skylake DT]] || style="background-color: #eeffcc;" | 4
+
| style="background-color: #ffe6ff;" | [[14 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/skylake|Skylake}} || style="background-color: #ebebe0;" | [[Skylake DT]] || style="background-color: #eeffcc;" | 4
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #e6f7ff;" rowspan="3" | 2016 || style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[14 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/broadwell|Broadwell}} || style="background-color: #ebebe0;" | [[Broadwell EP]] || style="background-color: #eeffcc;" | 4,6,8,01,12,14,16,18,20,22
+
| style="background-color: #e6f7ff;" rowspan="3" | 2016 || style="background-color: #ffe6ff;" | [[14 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/broadwell|Broadwell}} || style="background-color: #ebebe0;" | [[Broadwell EP]] || style="background-color: #eeffcc;" | 4,6,8,01,12,14,16,18,20,22
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[14 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/broadwell|Broadwell}} || style="background-color: #ebebe0;" | [[Broadwell EX]] || style="background-color: #eeffcc;" | 8,10,14,16,20,22,24
+
| style="background-color: #ffe6ff;" | [[14 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/broadwell|Broadwell}} || style="background-color: #ebebe0;" | [[Broadwell EX]] || style="background-color: #eeffcc;" | 8,10,14,16,20,22,24
 
|- style="height: 25px;"
 
|- style="height: 25px;"
| style="background-color: #fff5cc;" | {{intel|Xeon (2001)|Xeon}} || style="background-color: #ffe6ff;" | [[14 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/skylake|Skylake}} || style="background-color: #ebebe0;" |  [[Skylake H]] || style="background-color: #eeffcc;" | 4
+
| style="background-color: #ffe6ff;" | [[14 nm]] || style="background-color: #b3ffb3;" | {{intel|microarchitectures/skylake|Skylake}} || style="background-color: #ebebe0;" |  [[Skylake H]] || style="background-color: #eeffcc;" | 4
 
|}
 
|}
  

Revision as of 13:48, 13 September 2016

Xeon
xeon logos.png
Past and current logos
Developer Intel
Manufacturer Intel
Type Microprocessors
Introduction June 29, 1998 (announced)
1998 (launch)
Production 1998
ISA x86-64
µarch P6, NetBurst, Core, Penryn, Nehalem, Westmere, Sandy Bridge, Ivy Bridge, Haswell, Broadwell, Skylake
Word size 32 bit
4 octets
8 nibbles
, 64 bit
8 octets
16 nibbles
Process 350 nm
0.35 μm
3.5e-4 mm
, 250 nm
0.25 μm
2.5e-4 mm
, 180 nm
0.18 μm
1.8e-4 mm
, 65 nm
0.065 μm
6.5e-5 mm
, 45 nm
0.045 μm
4.5e-5 mm
, 32 nm
0.032 μm
3.2e-5 mm
, 22 nm
0.022 μm
2.2e-5 mm
, 14 nm
0.014 μm
1.4e-5 mm
Technology CMOS
Clock 400 MHz-4000 MHz
Succession
Pentium Pro

Xeon (pronounced "Zee-On") is an extended family of high-performance x86 microprocessors developed by Intel for server environments and non-consumer workstations. Over the years Xeon has grown to focus on high-bandwidth, large-memory, and highly concurrent workloads. Xeon processors typically incorporate a large number of cores, large cache, and support for large amount of memory. Xeon offers models for both uniprocessor or multiprocessors.

Xeon Timeline

Intro Family Process µarch Core Name Core Count
1998 Pentium II Xeon 250 nm P6 Drake 1
1999 Pentium III Xeon 250 nm P6 Tanner 1
180 nm P6 Cascades 1
2001 Xeon 180 nm NetBurst Foster 1
2002 130 nm NetBurst Prestonia 1
2003 130 nm NetBurst Gallatin 1
2004 90 nm NetBurst Nocona 1
2005 90 nm NetBurst Irwindale 1
90 nm NetBurst Paxville 2
90 nm NetBurst Potomac 1
90 nm NetBurst Cranford 1
2006 65 nm NetBurst Dempsey 2
65 nm NetBurst Tulsa 2
65 nm MPM Sossaman 2
65 nm Core Woodcrest 2
65 nm Core Conroe 2
65 nm Core Clovertown 4
2007 65 nm Core Allendale 2
65 nm Core Kentsfield 4
65 nm Core Tigerton 2
45 nm Penryn Wolfdale 2
45 nm Penryn Harpertown 4
2008 45 nm Penryn Yorkfield 4
45 nm Penryn Dunnington 4,6
2009 45 nm Nehalem Lynnfield 4
45 nm Nehalem Bloomfield 2,4
45 nm Nehalem Gainestown 2,4
2010 45 nm Nehalem Jasper Forest 1,2,4
45 nm Nehalem Beckton 4,6,8
32 nm Westmere Clarkdale 2
32 nm Westmere Gulftown 6
32 nm Westmere Westmere EP 2,4,6
Xeon E3
Xeon E5
Xeon E7
32 nm Westmere Westmere EX 6,8,10
2011 32 nm Sandy Bridge Sandy Bridge 2,4
2012 32 nm Sandy Bridge Gladden 4
32 nm Sandy Bridge Sandy Bridge EN 4,6,8
32 nm Sandy Bridge Sandy Bridge EP 4,6,8
22 nm Ivy Bridge Ivy Bridge 2,4
2013 22 nm Ivy Bridge Gladden 4
22 nm Ivy Bridge Ivy Bridge EP 4,6,8,10,12
22 nm Haswell Haswell WS 2,4
2014 22 nm Ivy Bridge Ivy Bridge EN 4,6,8,10
22 nm Ivy Bridge Ivy Bridge EX 12,15
22 nm Haswell Haswell EP 4,6,8,10,12,14
2015 22 nm Haswell Haswell EN 4,6,8,10
22 nm Haswell Haswell EX 8,10,12,14,16,18
14 nm Broadwell Broadwell DE 4,6,8,12,16
14 nm Broadwell Broadwell H 4
14 nm Skylake Skylake DT 4
2016 14 nm Broadwell Broadwell EP 4,6,8,01,12,14,16,18,20,22
14 nm Broadwell Broadwell EX 8,10,14,16,20,22,24
14 nm Skylake Skylake H 4


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Facts about "Xeon - Intel"
designerIntel +
first announcedJune 29, 1998 +
first launched1998 +
full page nameintel/xeon +
instance ofmicroprocessor extended family +
instruction set architecturex86-64 +
main designerIntel +
manufacturerIntel +
microarchitectureP6 +, NetBurst +, Core +, Penryn +, Nehalem +, Westmere +, Sandy Bridge +, Ivy Bridge +, Haswell +, Broadwell + and Skylake +
nameXeon +
process350 nm (0.35 μm, 3.5e-4 mm) +, 250 nm (0.25 μm, 2.5e-4 mm) +, 180 nm (0.18 μm, 1.8e-4 mm) +, 65 nm (0.065 μm, 6.5e-5 mm) +, 45 nm (0.045 μm, 4.5e-5 mm) +, 32 nm (0.032 μm, 3.2e-5 mm) +, 22 nm (0.022 μm, 2.2e-5 mm) + and 14 nm (0.014 μm, 1.4e-5 mm) +
technologyCMOS +
word size32 bit (4 octets, 8 nibbles) + and 64 bit (8 octets, 16 nibbles) +