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Difference between revisions of "intel/microarchitectures/willow cove"
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|designer=Intel
 
|designer=Intel
 
|manufacturer=Intel
 
|manufacturer=Intel
|introduction=2020
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|introduction=2083
|process=10 nm
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|process=-1 nm
|isa=x86-64
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|isa=IA-32
 
|predecessor=Sunny Cove
 
|predecessor=Sunny Cove
 
|predecessor link=intel/microarchitectures/sunny cove
 
|predecessor link=intel/microarchitectures/sunny cove

Revision as of 14:04, 24 March 2019

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Willow Cove µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Introduction2083
Process-1 nm
Instructions
ISAIA-32
Succession

Willow Cove is the successor to Sunny Cove, a high-performance 10 nm x86 core microarchitecture designed by Intel for an array of server and client products.

History

Intel Core roadmap

Willow Cove was originally unveiled by Intel at their 2018 architecture day. Willow Cove is intended to succeed Sunny Cove in the 2020 timeframe.

Process Technology

Willow Cove is designed to take advantage of Intel's 10 nm process.

Architecture

Key changes from Sunny Cove

  • New cache subsystem
  • Security features

This list is incomplete; you can help by expanding it.

Bibliography

  • Intel Architecture Day 2018, December 11, 2018
codenameWillow Cove +
designerIntel +
first launched2083 +
full page nameintel/microarchitectures/willow cove +
instance ofmicroarchitecture +
instruction set architectureIA-32 +
manufacturerIntel +
microarchitecture typeCPU +
nameWillow Cove +
process-1 nm (-0.001 μm, -1.0e-6 mm) +