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'''Willow Cove''' is the successor to {{\\|Sunny Cove}}, a high-performance [[10 nm]] [[x86]] core microarchitecture designed by [[Intel]] for an array of server and client products, including {{\\|Tiger Lake}} and {{\\|Sapphire Rapids}}.
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'''Willow Cove''' is the successor to {{\\|Sunny Cove}}, a high-performance [[10 nm]] [[x86]] core microarchitecture designed by [[Intel]] for an array of server and client products, including {{\\|Tiger Lake}}.
  
 
== History ==
 
== History ==

Latest revision as of 02:07, 12 August 2019

Edit Values
Willow Cove µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Introduction2020
Process10 nm
Instructions
ISAx86-64
Succession

Willow Cove is the successor to Sunny Cove, a high-performance 10 nm x86 core microarchitecture designed by Intel for an array of server and client products, including Tiger Lake.

History[edit]

Intel Core roadmap

Willow Cove was originally unveiled by Intel at their 2018 architecture day. Willow Cove is intended to succeed Sunny Cove in the 2020 timeframe.

Process Technology[edit]

Willow Cove is designed to take advantage of Intel's 10 nm process.

Architecture[edit]

Key changes from Sunny Cove[edit]

  • New cache subsystem
  • Security features

This list is incomplete; you can help by expanding it.

New instructions[edit]

Sunny Cove introduced a number of new instructions:

  • Control-flow Enforcement Technology (CET) enhancements
  • MOVDIR - Direct stores
  • Additional AVX-512 extensions:

Only on server parts (Sapphire Rapids):

Bibliography[edit]

  • Intel Architecture Day 2018, December 11, 2018
codenameWillow Cove +
designerIntel +
first launched2020 +
full page nameintel/microarchitectures/willow cove +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameWillow Cove +
process10 nm (0.01 μm, 1.0e-5 mm) +