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Whiskey Lake - Microarchitectures - Intel
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Whiskey Lake µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
IntroductionJuly, 2018
Process14 nm
Core Configs4
Pipeline
OoOEYes
SpeculativeYes
Reg RenamingYes
Stages14-19
Decode5-way
Instructions
ISAx86-64
ExtensionsMOVBE, MMX, SSE, SSE2, SSE3, SSSE3, SSE4.1, SSE4.2, POPCNT, AVX, AVX2, AES, PCLMUL, FSGSBASE, RDRND, FMA3, F16C, BMI, BMI2, VT-x, VT-d, TXT, TSX, RDSEED, ADCX, PREFETCHW, CLFLUSHOPT, XSAVE, SGX, MPX
Cache
L1I Cache32 KiB/core
8-way set associative
L1D Cache32 KiB/core
8-way set associative
L2 Cache256 KiB/core
4-way set associative
L3 Cache2 MiB/core
Up to 16-way set associative
Cores
Core NamesWhiskey Lake U
Succession
Contemporary
Coffee Lake
Cannon Lake

Whiskey Lake (WHL) is a microarchitecture designed by Intel as a successor to Kaby Lake for ultra-low power mobile devices, launched concurrently with Coffee Lake and Amber Lake.

Codenames

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Core Abbrev Description Graphics Target
Whiskey Lake U WHL-U Ultra-low power GT2 Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room

Brands

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Release Dates

Whiskey Lake processors are expected to be introduced in the summer of 2018.

Technology

Whiskey Lake is fabricated on 3rd generation improved 14++ process.

Compatibility

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Compiler support

Compiler Arch-Specific Arch-Favorable
ICC -march=skylake -mtune=skylake
GCC -march=skylake -mtune=skylake
LLVM -march=skylake -mtune=skylake
Visual Studio /arch:AVX2 /tune:skylake

CPUID

Core Extended
Family
Family Extended
Model
Model
U 0 0x6  ?  ?
Family 6 Model ?

Architecture

Key changes from Kaby Lake

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Overview

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