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| − | {{intel title|Tremont|arch}}
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| − | {{microarchitecture
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| − | |atype=CPU
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| − | |name=Tremont
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| − | |designer=Intel
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| − | |manufacturer=Intel
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| − | |introduction=2019
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| − | |process=10 nm
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| − | |type=Superscalar
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| − | |oooe=Yes
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| − | |speculative=Yes
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| − | |renaming=Yes
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| − | |isa=x86-64
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| − | |extension=MOVBE
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| − | |extension 2=MMX
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| − | |extension 3=SSE
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| − | |extension 4=SSE2
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| − | |extension 5=SSE3
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| − | |extension 6=SSSE3
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| − | |extension 7=SSE4.1
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| − | |extension 8=SSE4.2
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| − | |extension 9=POPCNT
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| − | |extension 10=AES
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| − | |extension 11=PCLMUL
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| − | |extension 12=RDRND
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| − | |extension 13=XSAVE
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| − | |extension 14=XSAVEOPT
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| − | |extension 15=FSGSBASE
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| − | |extension 16=PTWRITE
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| − | |extension 17=RDPID
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| − | |extension 18=SGX
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| − | |extension 19=UMIP
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| − | |extension 20=GFNI-SSE
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| − | |extension 21=CLWB
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| − | |extension 22=ENCLV
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| − | |extension 23=SHA
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| − | |core name=Elkhart Lake
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| − | |core name 2=Jasper Lake
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| − | |core name 3=Skyhawk Lake
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| − | |predecessor=Goldmont Plus
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| − | |predecessor link=intel/microarchitectures/goldmont plus
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| − | |successor=Gracemont
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| − | |successor link=intel/microarchitectures/gracemont
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| − | }}
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| − | '''Tremont''' is [[Intel]]'s successor to {{\\|Goldmont Plus}}, a [[10 nm]] microarchitecture for ultra-low power devices and microservers.
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| | | | |
| − | == Codenames ==
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| − | {| class="wikitable"
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| − | ! Platform !! Core Name || PCH
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| − | |-
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| − | | || {{intel|Skyhawk Lake|l=core}} ||
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| − | |-
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| − | | Jacobsville || {{intel|Elkhart Lake|l=core}} || {{intel|Mule Creek Canyon|l=chipset}}
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| − | |-
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| − | | || {{intel|Jasper Lake|l=core}} ||
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| − | |}
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| − |
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| − | == Brands ==
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| − | {{empty section}}
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| − |
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| − | == Release Dates ==
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| − | Tremont was released in a number of products in late 2019.
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| − |
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| − | == Technology ==
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| − | Tremont uses Intel's [[10 nm process]].
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| − |
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| − | == Compiler support ==
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| − | {| class="wikitable"
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| − | |-
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| − | ! Compiler !! Arch-Specific || Arch-Favorable
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| − | |-
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| − | | [[ICC]] || <code>-march=tremont</code> || <code>-mtune=tremont</code>
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| − | |-
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| − | | [[GCC]] || <code>-march=tremont</code> || <code>-mtune=tremont</code>
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| − | |-
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| − | | [[LLVM]] || <code>-march=tremont</code> || <code>-mtune=tremont</code>
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| − | |-
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| − | | [[Visual Studio]] || <code>/arch:?</code> || <code>/tune:?</code>
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| − | |}
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| − |
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| − | === CPUID ===
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| − | {| class="wikitable tc1 tc2 tc3 tc4"
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| − | ! Core !! Extended<br>Family !! Family !! Extended<br>Model !! Model
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| − | |-
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| − | | rowspan="2" | ? || 0 || 0x6 || 0x8 || 0x6
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| − | |-
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| − | | colspan="4" | Family 6 Model 134
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| − | |}
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| − |
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| − | == Architecture ==
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| − | Tremont is designed with significant single-thread performance in mind while focusing on low-power small silicon area cores.
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| − | === Key changes from {{\\|Goldmont Plus}} ===
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| − | * Significant [[IPC]] uplift ([[Intel]] self-reported average 32% IPC accross proxy benchmarks such as [[SPEC CPU2006]]/[[SPEC CPU2017]])
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| − | * Front-end
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| − | ** Redesigned front-end
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| − | *** New dual symmetric decode cluster
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| − | **** Out-of-order decode
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| − | **** 6-wide decode
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| − | ***** 3-way decode per cluster
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| − | ** Smarter [[prefetchers]]
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| − | ** Improved [[branch predictor]]
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| − | *** Big-core level of performance
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| − | * Back-end
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| − | ** larger ROB
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| − | ** wide issue (10-wide)
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| − | * Execution Engine
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| − | ** 2x store data ports (up from 1)
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| − |
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| − |
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| − | ====New instructions ====
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| − | Tremont introduced a number of {{x86|extensions|new instructions}}:
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| − |
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| − | * {{x86|CLWB|<code>CLWB</code>}} - Force cache line write-back without flush
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| − | * {{x86|ENCLV|<code>ENCLV</code>}} - SGX oversubscription instructions
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| − | * {{x86|CLDEMOTE|<code>CLDEMOTE</code>}} - Cache line demote instruction
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| − | * {{x86|SSE_GFNI|<code>SSE_GFNI</code>}} - SSE-based Galois Field New Instructions
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| − | * Direct store instructions: MOVDIRI, MOVDIR64B
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| − | * User wait instructions: TPAUSE, UMONITOR, UMWAIT
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| − | * Split Lock Detection - detection and cause an exception for split locks
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| − |
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| − | === Block Diagram ===
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| − | ==== Individual Core ====
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| − | :[[File:tremont block diagram.svg|850px]]
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