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'''Tigerlake''' ('''TGL''') is a planned [[microarchitecture]] by [[Intel]] as a successor to {{\\|Icelake}}. Tigerlake is expected to be fabricated using a [[10 nm process]]. Tigerlake is the "Optimization" microarchitecture as part of Intel's {{intel|PAO}} model.
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'''Tiger Lake''' ('''TGL''') is [[Intel]]'s successor to {{\\|Ice Lake (client)|Ice Lake}}, an enhanced [[10 nm process|10nm+ process]] [[microarchitecture]] for mainstream workstations, desktops, and mobile devices.
  
 
== Process Technology==
 
== Process Technology==

Revision as of 23:49, 5 April 2018

Edit Values
Tigerlake µarch
General Info
Arch TypeCPU
DesignerIntel
ManufacturerIntel
Introduction2019
Process10 nm
Instructions
ISAx86-64
Succession
Contemporary
Sapphire Rapids

Tiger Lake (TGL) is Intel's successor to Ice Lake, an enhanced 10nm+ process microarchitecture for mainstream workstations, desktops, and mobile devices.

Process Technology

Main article: Cannon Lake § Process Technology

Tigerlake is set to use the same 10 nm process that was designed for Cannon Lake.

Architecture

Not much is known about Tigerlake's architecture.

Key changes from Icelake

Symbol version future.svg Preliminary Data! Information presented in this article deal with future products, data, features, and specifications that have yet to be finalized, announced, or released. Information may be incomplete and can change by final release.


See also

codenameTigerlake +
designerIntel +
first launched2019 +
full page nameintel/microarchitectures/tiger lake +
instance ofmicroarchitecture +
instruction set architecturex86-64 +
manufacturerIntel +
microarchitecture typeCPU +
nameTigerlake +
process10 nm (0.01 μm, 1.0e-5 mm) +