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Difference between revisions of "intel/microarchitectures/tiger lake"
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|contemporary=Sapphire Rapids | |contemporary=Sapphire Rapids | ||
|contemporary link=intel/microarchitectures/sapphire rapids | |contemporary link=intel/microarchitectures/sapphire rapids | ||
+ | |contemporary 2=Rocket Lake | ||
+ | |contemporary 2 link=intel/microarchitectures/rocket lake | ||
|succession=Yes | |succession=Yes | ||
}} | }} | ||
'''Tiger Lake''' ('''TGL''') is [[Intel]]'s successor to {{\\|Ice Lake (client)|Ice Lake}}, a [[10 nm process|10nm]] [[microarchitecture]] for mainstream workstations, desktops, and mobile devices. | '''Tiger Lake''' ('''TGL''') is [[Intel]]'s successor to {{\\|Ice Lake (client)|Ice Lake}}, a [[10 nm process|10nm]] [[microarchitecture]] for mainstream workstations, desktops, and mobile devices. | ||
+ | |||
+ | == Codenames == | ||
+ | {| class="wikitable" | ||
+ | |- | ||
+ | ! Core !! Abbrev !! Description !! Graphics !! Target | ||
+ | |- | ||
+ | | {{intel|Tiger Lake Y|l=core}} || TGL-Y || Extremely low power || || 2-in-1s detachable, tablets, and computer sticks | ||
+ | |- | ||
+ | | {{intel|Tiger Lake U|l=core}} || TGL-U || Ultra-low Power || || Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room | ||
+ | |- | ||
+ | | {{intel|Tiger Lake H35|l=core}} || TGL-H35 || High-performance Graphics || || 35W TDP. High mobile performance, mobile workstations | ||
+ | |- | ||
+ | | {{intel|Tiger Lake H45|l=core}} || TGL-H45 || High-performance Graphics || || 45W TDP. Ultimate mobile performance, mobile gaming, mobile workstations | ||
+ | |} | ||
== Process Technology== | == Process Technology== | ||
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** {{\\|Sunny Cove}} '''➡''' {{\\|Willow Cove}} | ** {{\\|Sunny Cove}} '''➡''' {{\\|Willow Cove}} | ||
** Up to 50% larger Level 3 cache - 3MB per core from 2MB per core | ** Up to 50% larger Level 3 cache - 3MB per core from 2MB per core | ||
− | ** 2, | + | ** 2,5x larger Level 2 cache - 1,25MB per core from 512KB per core |
* GPU | * GPU | ||
** {{intel|Gen11|l=arch}} '''➡''' {{intel|Gen12|l=arch}} (Xe) | ** {{intel|Gen11|l=arch}} '''➡''' {{intel|Gen12|l=arch}} (Xe) |
Latest revision as of 03:50, 13 January 2021
Edit Values | |
Tiger Lake µarch | |
General Info | |
Arch Type | CPU |
Designer | Intel |
Manufacturer | Intel |
Introduction | September 2, 2020 |
Process | 10 nm |
Instructions | |
ISA | x86-64 |
Cores | |
Core Names | Tiger Lake U, Tiger Lake H |
Succession | |
Contemporary | |
Sapphire Rapids Rocket Lake |
Tiger Lake (TGL) is Intel's successor to Ice Lake, a 10nm microarchitecture for mainstream workstations, desktops, and mobile devices.
Codenames[edit]
Core | Abbrev | Description | Graphics | Target |
---|---|---|---|---|
Tiger Lake Y | TGL-Y | Extremely low power | 2-in-1s detachable, tablets, and computer sticks | |
Tiger Lake U | TGL-U | Ultra-low Power | Light notebooks, portable All-in-Ones (AiOs), Minis, and conference room | |
Tiger Lake H35 | TGL-H35 | High-performance Graphics | 35W TDP. High mobile performance, mobile workstations | |
Tiger Lake H45 | TGL-H45 | High-performance Graphics | 45W TDP. Ultimate mobile performance, mobile gaming, mobile workstations |
Process Technology[edit]
- Main article: Cannon Lake § Process Technology
Tiger Lake will be manufactured on Intel's third generation enhanced 10nm++ process.
History[edit]
Tiger Lake was first announced at Intel's 2019 Investor Meeting in May. Tiger Lake was said to succeed Ice Lake in 2020.
Architecture[edit]
Not much is known about Tiger Lake's architecture.
Key changes from Ice Lake[edit]
- Core
- Sunny Cove ➡ Willow Cove
- Up to 50% larger Level 3 cache - 3MB per core from 2MB per core
- 2,5x larger Level 2 cache - 1,25MB per core from 512KB per core
- GPU
- Display
- HDMI 2.1 (from HDMI 2.0b)
- I/O
- PCIe 4.0 (from 3.0)
- Hardware Telemetry
- Intel Platform Monitoring Technology provides access to hardware performance, sampling and tracing data.
Facts about "Tiger Lake - Microarchitectures - Intel"
codename | Tiger Lake + |
designer | Intel + |
first launched | September 2, 2020 + |
full page name | intel/microarchitectures/tiger lake + |
instance of | microarchitecture + |
instruction set architecture | x86-64 + |
manufacturer | Intel + |
microarchitecture type | CPU + |
name | Tiger Lake + |
process | 10 nm (0.01 μm, 1.0e-5 mm) + |